5 files changed, 18 insertions, 18 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index 360cfc33..da3adb72 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -723,7 +723,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm,
          */
         while (pnode) {
                 /* Flush WPR header to memory*/
-                gk20a_mem_wr_n(g, ucode, i * sizeof(pnode->wpr_header),
+                nvgpu_mem_wr_n(g, ucode, i * sizeof(pnode->wpr_header),
                                 &pnode->wpr_header, sizeof(pnode->wpr_header));
 
                 gm20b_dbg_pmu("wpr header");
@@ -739,7 +739,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm,
                                 pnode->wpr_header.status);
 
                 /*Flush LSB header to memory*/
-                gk20a_mem_wr_n(g, ucode, pnode->wpr_header.lsb_offset,
+                nvgpu_mem_wr_n(g, ucode, pnode->wpr_header.lsb_offset,
                                 &pnode->lsb_header, sizeof(pnode->lsb_header));
 
                 gm20b_dbg_pmu("lsb header");
@@ -773,13 +773,13 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm,
                 if (!pnode->ucode_img.header) {
                         /*Populate gen bl and flush to memory*/
                         lsfm_fill_flcn_bl_gen_desc(g, pnode);
-                        gk20a_mem_wr_n(g, ucode,
+                        nvgpu_mem_wr_n(g, ucode,
                                         pnode->lsb_header.bl_data_off,
                                         &pnode->bl_gen_desc,
                                         pnode->bl_gen_desc_size);
                 }
                 /*Copying of ucode*/
-                gk20a_mem_wr_n(g, ucode, pnode->lsb_header.ucode_off,
+                nvgpu_mem_wr_n(g, ucode, pnode->lsb_header.ucode_off,
                                 pnode->ucode_img.data,
                                 pnode->ucode_img.data_size);
                 pnode = pnode->next;
@@ -787,7 +787,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm,
         }
 
         /* Tag the terminator WPR header with an invalid falcon ID. */
-        gk20a_mem_wr32(g, ucode,
+        nvgpu_mem_wr32(g, ucode,
                         plsfm->managed_flcn_cnt * sizeof(struct lsf_wpr_header) +
                         offsetof(struct lsf_wpr_header, falcon_id),
                         LSF_FALCON_ID_INVALID);
@@ -1133,7 +1133,7 @@ static int gm20b_bootstrap_hs_flcn(struct gk20a *g)
                 ((struct flcn_acr_desc *)acr_dmem)->regions.no_regions = 2;
                 ((struct flcn_acr_desc *)acr_dmem)->wpr_offset = 0;
 
-                gk20a_mem_wr_n(g, &acr->acr_ucode, 0,
+                nvgpu_mem_wr_n(g, &acr->acr_ucode, 0,
                                 acr_ucode_data_t210_load, img_size_in_bytes);
                 /*
                  * In order to execute this binary, we will be using
@@ -1433,7 +1433,7 @@ int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt)
                         goto err_free_ucode;
                 }
 
-                gk20a_mem_wr_n(g, &acr->hsbl_ucode, 0, pmu_bl_gm10x, bl_sz);
+                nvgpu_mem_wr_n(g, &acr->hsbl_ucode, 0, pmu_bl_gm10x, bl_sz);
                 gm20b_dbg_pmu("Copied bl ucode to bl_cpuva\n");
         }
         /*
diff --git a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
index 68a4b15f..ba04945b 100644
--- a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c
@@ -33,7 +33,7 @@ static int gm20b_bus_bar1_bind(struct gk20a *g, struct mem_desc *bar1_inst)
         gk20a_dbg_info("bar1 inst block ptr: 0x%08x", ptr_v);
 
         gk20a_writel(g, bus_bar1_block_r(),
-                     gk20a_aperture_mask(g, bar1_inst,
+                     nvgpu_aperture_mask(g, bar1_inst,
                        bus_bar1_block_target_sys_mem_ncoh_f(),
                        bus_bar1_block_target_vid_mem_f()) |
                      bus_bar1_block_mode_virtual_f() |
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
index edf962de..6c34689b 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
@@ -41,7 +41,7 @@ static void channel_gm20b_bind(struct channel_gk20a *c)
 
         gk20a_writel(g, ccsr_channel_inst_r(c->hw_chid),
                 ccsr_channel_inst_ptr_f(inst_ptr) |
-                gk20a_aperture_mask(g, &c->inst_block,
+                nvgpu_aperture_mask(g, &c->inst_block,
                  ccsr_channel_inst_target_sys_mem_ncoh_f(),
                  ccsr_channel_inst_target_vid_mem_f()) |
                 ccsr_channel_inst_bind_true_f());
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index a5dbe23d..57bff64f 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -862,7 +862,7 @@ static void gr_gm20b_update_ctxsw_preemption_mode(struct gk20a *g,
 
         if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CTA) {
                 gk20a_dbg_info("CTA: %x", cta_preempt_option);
-                gk20a_mem_wr(g, mem,
+                nvgpu_mem_wr(g, mem,
                                 ctxsw_prog_main_image_preemption_options_o(),
                                 cta_preempt_option);
         }
@@ -1022,15 +1022,15 @@ static int gr_gm20b_update_pc_sampling(struct channel_gk20a *c,
 
         mem = &ch_ctx->gr_ctx->mem;
 
-        if (gk20a_mem_begin(c->g, mem))
+        if (nvgpu_mem_begin(c->g, mem))
                 return -ENOMEM;
 
-        v = gk20a_mem_rd(c->g, mem, ctxsw_prog_main_image_pm_o());
+        v = nvgpu_mem_rd(c->g, mem, ctxsw_prog_main_image_pm_o());
         v &= ~ctxsw_prog_main_image_pm_pc_sampling_m();
         v |= ctxsw_prog_main_image_pm_pc_sampling_f(enable);
-        gk20a_mem_wr(c->g, mem, ctxsw_prog_main_image_pm_o(), v);
+        nvgpu_mem_wr(c->g, mem, ctxsw_prog_main_image_pm_o(), v);
 
-        gk20a_mem_end(c->g, mem);
+        nvgpu_mem_end(c->g, mem);
 
         gk20a_dbg_fn("done");
 
@@ -1112,9 +1112,9 @@ static void gr_gm20b_enable_cde_in_fecs(struct gk20a *g, struct mem_desc *mem)
 {
         u32 cde_v;
 
-        cde_v = gk20a_mem_rd(g, mem, ctxsw_prog_main_image_ctl_o());
+        cde_v = nvgpu_mem_rd(g, mem, ctxsw_prog_main_image_ctl_o());
         cde_v |=  ctxsw_prog_main_image_ctl_cde_enabled_f();
-        gk20a_mem_wr(g, mem, ctxsw_prog_main_image_ctl_o(), cde_v);
+        nvgpu_mem_wr(g, mem, ctxsw_prog_main_image_ctl_o(), cde_v);
 }
 
 static void gr_gm20b_bpt_reg_info(struct gk20a *g, struct warpstate *w_state)
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index 949a5c5d..08d446e7 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -28,7 +28,7 @@ static void gm20b_mm_set_big_page_size(struct gk20a *g,
         gk20a_dbg_fn("");
 
         gk20a_dbg_info("big page size %d\n", size);
-        val = gk20a_mem_rd32(g, mem, ram_in_big_page_size_w());
+        val = nvgpu_mem_rd32(g, mem, ram_in_big_page_size_w());
         val &= ~ram_in_big_page_size_m();
 
         if (size == SZ_64K)
@@ -36,7 +36,7 @@ static void gm20b_mm_set_big_page_size(struct gk20a *g,
         else
                 val |= ram_in_big_page_size_128kb_f();
 
-        gk20a_mem_wr32(g, mem, ram_in_big_page_size_w(), val);
+        nvgpu_mem_wr32(g, mem, ram_in_big_page_size_w(), val);
         gk20a_dbg_fn("done");
 }