diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/bus_gm20b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/mm_gm20b.c | 4 |
5 files changed, 18 insertions, 18 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 360cfc33..da3adb72 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -723,7 +723,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm, | |||
723 | */ | 723 | */ |
724 | while (pnode) { | 724 | while (pnode) { |
725 | /* Flush WPR header to memory*/ | 725 | /* Flush WPR header to memory*/ |
726 | gk20a_mem_wr_n(g, ucode, i * sizeof(pnode->wpr_header), | 726 | nvgpu_mem_wr_n(g, ucode, i * sizeof(pnode->wpr_header), |
727 | &pnode->wpr_header, sizeof(pnode->wpr_header)); | 727 | &pnode->wpr_header, sizeof(pnode->wpr_header)); |
728 | 728 | ||
729 | gm20b_dbg_pmu("wpr header"); | 729 | gm20b_dbg_pmu("wpr header"); |
@@ -739,7 +739,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm, | |||
739 | pnode->wpr_header.status); | 739 | pnode->wpr_header.status); |
740 | 740 | ||
741 | /*Flush LSB header to memory*/ | 741 | /*Flush LSB header to memory*/ |
742 | gk20a_mem_wr_n(g, ucode, pnode->wpr_header.lsb_offset, | 742 | nvgpu_mem_wr_n(g, ucode, pnode->wpr_header.lsb_offset, |
743 | &pnode->lsb_header, sizeof(pnode->lsb_header)); | 743 | &pnode->lsb_header, sizeof(pnode->lsb_header)); |
744 | 744 | ||
745 | gm20b_dbg_pmu("lsb header"); | 745 | gm20b_dbg_pmu("lsb header"); |
@@ -773,13 +773,13 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm, | |||
773 | if (!pnode->ucode_img.header) { | 773 | if (!pnode->ucode_img.header) { |
774 | /*Populate gen bl and flush to memory*/ | 774 | /*Populate gen bl and flush to memory*/ |
775 | lsfm_fill_flcn_bl_gen_desc(g, pnode); | 775 | lsfm_fill_flcn_bl_gen_desc(g, pnode); |
776 | gk20a_mem_wr_n(g, ucode, | 776 | nvgpu_mem_wr_n(g, ucode, |
777 | pnode->lsb_header.bl_data_off, | 777 | pnode->lsb_header.bl_data_off, |
778 | &pnode->bl_gen_desc, | 778 | &pnode->bl_gen_desc, |
779 | pnode->bl_gen_desc_size); | 779 | pnode->bl_gen_desc_size); |
780 | } | 780 | } |
781 | /*Copying of ucode*/ | 781 | /*Copying of ucode*/ |
782 | gk20a_mem_wr_n(g, ucode, pnode->lsb_header.ucode_off, | 782 | nvgpu_mem_wr_n(g, ucode, pnode->lsb_header.ucode_off, |
783 | pnode->ucode_img.data, | 783 | pnode->ucode_img.data, |
784 | pnode->ucode_img.data_size); | 784 | pnode->ucode_img.data_size); |
785 | pnode = pnode->next; | 785 | pnode = pnode->next; |
@@ -787,7 +787,7 @@ static void lsfm_init_wpr_contents(struct gk20a *g, struct ls_flcn_mgr *plsfm, | |||
787 | } | 787 | } |
788 | 788 | ||
789 | /* Tag the terminator WPR header with an invalid falcon ID. */ | 789 | /* Tag the terminator WPR header with an invalid falcon ID. */ |
790 | gk20a_mem_wr32(g, ucode, | 790 | nvgpu_mem_wr32(g, ucode, |
791 | plsfm->managed_flcn_cnt * sizeof(struct lsf_wpr_header) + | 791 | plsfm->managed_flcn_cnt * sizeof(struct lsf_wpr_header) + |
792 | offsetof(struct lsf_wpr_header, falcon_id), | 792 | offsetof(struct lsf_wpr_header, falcon_id), |
793 | LSF_FALCON_ID_INVALID); | 793 | LSF_FALCON_ID_INVALID); |
@@ -1133,7 +1133,7 @@ static int gm20b_bootstrap_hs_flcn(struct gk20a *g) | |||
1133 | ((struct flcn_acr_desc *)acr_dmem)->regions.no_regions = 2; | 1133 | ((struct flcn_acr_desc *)acr_dmem)->regions.no_regions = 2; |
1134 | ((struct flcn_acr_desc *)acr_dmem)->wpr_offset = 0; | 1134 | ((struct flcn_acr_desc *)acr_dmem)->wpr_offset = 0; |
1135 | 1135 | ||
1136 | gk20a_mem_wr_n(g, &acr->acr_ucode, 0, | 1136 | nvgpu_mem_wr_n(g, &acr->acr_ucode, 0, |
1137 | acr_ucode_data_t210_load, img_size_in_bytes); | 1137 | acr_ucode_data_t210_load, img_size_in_bytes); |
1138 | /* | 1138 | /* |
1139 | * In order to execute this binary, we will be using | 1139 | * In order to execute this binary, we will be using |
@@ -1433,7 +1433,7 @@ int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt) | |||
1433 | goto err_free_ucode; | 1433 | goto err_free_ucode; |
1434 | } | 1434 | } |
1435 | 1435 | ||
1436 | gk20a_mem_wr_n(g, &acr->hsbl_ucode, 0, pmu_bl_gm10x, bl_sz); | 1436 | nvgpu_mem_wr_n(g, &acr->hsbl_ucode, 0, pmu_bl_gm10x, bl_sz); |
1437 | gm20b_dbg_pmu("Copied bl ucode to bl_cpuva\n"); | 1437 | gm20b_dbg_pmu("Copied bl ucode to bl_cpuva\n"); |
1438 | } | 1438 | } |
1439 | /* | 1439 | /* |
diff --git a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c index 68a4b15f..ba04945b 100644 --- a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c | |||
@@ -33,7 +33,7 @@ static int gm20b_bus_bar1_bind(struct gk20a *g, struct mem_desc *bar1_inst) | |||
33 | gk20a_dbg_info("bar1 inst block ptr: 0x%08x", ptr_v); | 33 | gk20a_dbg_info("bar1 inst block ptr: 0x%08x", ptr_v); |
34 | 34 | ||
35 | gk20a_writel(g, bus_bar1_block_r(), | 35 | gk20a_writel(g, bus_bar1_block_r(), |
36 | gk20a_aperture_mask(g, bar1_inst, | 36 | nvgpu_aperture_mask(g, bar1_inst, |
37 | bus_bar1_block_target_sys_mem_ncoh_f(), | 37 | bus_bar1_block_target_sys_mem_ncoh_f(), |
38 | bus_bar1_block_target_vid_mem_f()) | | 38 | bus_bar1_block_target_vid_mem_f()) | |
39 | bus_bar1_block_mode_virtual_f() | | 39 | bus_bar1_block_mode_virtual_f() | |
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index edf962de..6c34689b 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -41,7 +41,7 @@ static void channel_gm20b_bind(struct channel_gk20a *c) | |||
41 | 41 | ||
42 | gk20a_writel(g, ccsr_channel_inst_r(c->hw_chid), | 42 | gk20a_writel(g, ccsr_channel_inst_r(c->hw_chid), |
43 | ccsr_channel_inst_ptr_f(inst_ptr) | | 43 | ccsr_channel_inst_ptr_f(inst_ptr) | |
44 | gk20a_aperture_mask(g, &c->inst_block, | 44 | nvgpu_aperture_mask(g, &c->inst_block, |
45 | ccsr_channel_inst_target_sys_mem_ncoh_f(), | 45 | ccsr_channel_inst_target_sys_mem_ncoh_f(), |
46 | ccsr_channel_inst_target_vid_mem_f()) | | 46 | ccsr_channel_inst_target_vid_mem_f()) | |
47 | ccsr_channel_inst_bind_true_f()); | 47 | ccsr_channel_inst_bind_true_f()); |
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index a5dbe23d..57bff64f 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -862,7 +862,7 @@ static void gr_gm20b_update_ctxsw_preemption_mode(struct gk20a *g, | |||
862 | 862 | ||
863 | if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CTA) { | 863 | if (gr_ctx->compute_preempt_mode == NVGPU_COMPUTE_PREEMPTION_MODE_CTA) { |
864 | gk20a_dbg_info("CTA: %x", cta_preempt_option); | 864 | gk20a_dbg_info("CTA: %x", cta_preempt_option); |
865 | gk20a_mem_wr(g, mem, | 865 | nvgpu_mem_wr(g, mem, |
866 | ctxsw_prog_main_image_preemption_options_o(), | 866 | ctxsw_prog_main_image_preemption_options_o(), |
867 | cta_preempt_option); | 867 | cta_preempt_option); |
868 | } | 868 | } |
@@ -1022,15 +1022,15 @@ static int gr_gm20b_update_pc_sampling(struct channel_gk20a *c, | |||
1022 | 1022 | ||
1023 | mem = &ch_ctx->gr_ctx->mem; | 1023 | mem = &ch_ctx->gr_ctx->mem; |
1024 | 1024 | ||
1025 | if (gk20a_mem_begin(c->g, mem)) | 1025 | if (nvgpu_mem_begin(c->g, mem)) |
1026 | return -ENOMEM; | 1026 | return -ENOMEM; |
1027 | 1027 | ||
1028 | v = gk20a_mem_rd(c->g, mem, ctxsw_prog_main_image_pm_o()); | 1028 | v = nvgpu_mem_rd(c->g, mem, ctxsw_prog_main_image_pm_o()); |
1029 | v &= ~ctxsw_prog_main_image_pm_pc_sampling_m(); | 1029 | v &= ~ctxsw_prog_main_image_pm_pc_sampling_m(); |
1030 | v |= ctxsw_prog_main_image_pm_pc_sampling_f(enable); | 1030 | v |= ctxsw_prog_main_image_pm_pc_sampling_f(enable); |
1031 | gk20a_mem_wr(c->g, mem, ctxsw_prog_main_image_pm_o(), v); | 1031 | nvgpu_mem_wr(c->g, mem, ctxsw_prog_main_image_pm_o(), v); |
1032 | 1032 | ||
1033 | gk20a_mem_end(c->g, mem); | 1033 | nvgpu_mem_end(c->g, mem); |
1034 | 1034 | ||
1035 | gk20a_dbg_fn("done"); | 1035 | gk20a_dbg_fn("done"); |
1036 | 1036 | ||
@@ -1112,9 +1112,9 @@ static void gr_gm20b_enable_cde_in_fecs(struct gk20a *g, struct mem_desc *mem) | |||
1112 | { | 1112 | { |
1113 | u32 cde_v; | 1113 | u32 cde_v; |
1114 | 1114 | ||
1115 | cde_v = gk20a_mem_rd(g, mem, ctxsw_prog_main_image_ctl_o()); | 1115 | cde_v = nvgpu_mem_rd(g, mem, ctxsw_prog_main_image_ctl_o()); |
1116 | cde_v |= ctxsw_prog_main_image_ctl_cde_enabled_f(); | 1116 | cde_v |= ctxsw_prog_main_image_ctl_cde_enabled_f(); |
1117 | gk20a_mem_wr(g, mem, ctxsw_prog_main_image_ctl_o(), cde_v); | 1117 | nvgpu_mem_wr(g, mem, ctxsw_prog_main_image_ctl_o(), cde_v); |
1118 | } | 1118 | } |
1119 | 1119 | ||
1120 | static void gr_gm20b_bpt_reg_info(struct gk20a *g, struct warpstate *w_state) | 1120 | static void gr_gm20b_bpt_reg_info(struct gk20a *g, struct warpstate *w_state) |
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c index 949a5c5d..08d446e7 100644 --- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c | |||
@@ -28,7 +28,7 @@ static void gm20b_mm_set_big_page_size(struct gk20a *g, | |||
28 | gk20a_dbg_fn(""); | 28 | gk20a_dbg_fn(""); |
29 | 29 | ||
30 | gk20a_dbg_info("big page size %d\n", size); | 30 | gk20a_dbg_info("big page size %d\n", size); |
31 | val = gk20a_mem_rd32(g, mem, ram_in_big_page_size_w()); | 31 | val = nvgpu_mem_rd32(g, mem, ram_in_big_page_size_w()); |
32 | val &= ~ram_in_big_page_size_m(); | 32 | val &= ~ram_in_big_page_size_m(); |
33 | 33 | ||
34 | if (size == SZ_64K) | 34 | if (size == SZ_64K) |
@@ -36,7 +36,7 @@ static void gm20b_mm_set_big_page_size(struct gk20a *g, | |||
36 | else | 36 | else |
37 | val |= ram_in_big_page_size_128kb_f(); | 37 | val |= ram_in_big_page_size_128kb_f(); |
38 | 38 | ||
39 | gk20a_mem_wr32(g, mem, ram_in_big_page_size_w(), val); | 39 | nvgpu_mem_wr32(g, mem, ram_in_big_page_size_w(), val); |
40 | gk20a_dbg_fn("done"); | 40 | gk20a_dbg_fn("done"); |
41 | } | 41 | } |
42 | 42 | ||