diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 320aa600..66bb471a 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -756,7 +756,7 @@ static void gr_gm20b_load_gpccs_with_bootloader(struct gk20a *g) | |||
756 | 756 | ||
757 | int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) | 757 | int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) |
758 | { | 758 | { |
759 | u32 err, flags; | 759 | u32 err; |
760 | u32 reg_offset = gr_gpcs_gpccs_falcon_hwcfg_r() - | 760 | u32 reg_offset = gr_gpcs_gpccs_falcon_hwcfg_r() - |
761 | gr_fecs_falcon_hwcfg_r(); | 761 | gr_fecs_falcon_hwcfg_r(); |
762 | u8 falcon_id_mask = 0; | 762 | u8 falcon_id_mask = 0; |
@@ -770,7 +770,6 @@ int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) | |||
770 | gr_gpccs_ctxsw_mailbox_value_f(0xc0de7777)); | 770 | gr_gpccs_ctxsw_mailbox_value_f(0xc0de7777)); |
771 | } | 771 | } |
772 | 772 | ||
773 | flags = PMU_ACR_CMD_BOOTSTRAP_FALCON_FLAGS_RESET_YES; | ||
774 | g->pmu_lsf_loaded_falcon_id = 0; | 773 | g->pmu_lsf_loaded_falcon_id = 0; |
775 | if (nvgpu_is_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE)) { | 774 | if (nvgpu_is_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE)) { |
776 | /* this must be recovery so bootstrap fecs and gpccs */ | 775 | /* this must be recovery so bootstrap fecs and gpccs */ |