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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c4
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.h2
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 331c3af9..261c3054 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1278,7 +1278,7 @@ void gr_gm20b_get_access_map(struct gk20a *g,
1278 *num_entries = ARRAY_SIZE(wl_addr_gm20b); 1278 *num_entries = ARRAY_SIZE(wl_addr_gm20b);
1279} 1279}
1280 1280
1281int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc, 1281int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc, u32 sm,
1282 struct channel_gk20a *fault_ch) 1282 struct channel_gk20a *fault_ch)
1283{ 1283{
1284 int sm_id; 1284 int sm_id;
@@ -1306,7 +1306,7 @@ int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, u32 tpc,
1306 1306
1307 nvgpu_mutex_release(&g->dbg_sessions_lock); 1307 nvgpu_mutex_release(&g->dbg_sessions_lock);
1308 1308
1309 return 0; 1309 return sm_id;
1310} 1310}
1311 1311
1312int gm20b_gr_update_sm_error_state(struct gk20a *g, 1312int gm20b_gr_update_sm_error_state(struct gk20a *g,
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
index ff32d8ff..5c82fd65 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h
@@ -116,7 +116,7 @@ void gr_gm20b_bpt_reg_info(struct gk20a *g, struct nvgpu_warpstate *w_state);
116void gr_gm20b_get_access_map(struct gk20a *g, 116void gr_gm20b_get_access_map(struct gk20a *g,
117 u32 **whitelist, int *num_entries); 117 u32 **whitelist, int *num_entries);
118int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc, 118int gm20b_gr_record_sm_error_state(struct gk20a *g, u32 gpc,
119 u32 tpc, struct channel_gk20a *fault_ch); 119 u32 tpc, u32 sm, struct channel_gk20a *fault_ch);
120int gm20b_gr_update_sm_error_state(struct gk20a *g, 120int gm20b_gr_update_sm_error_state(struct gk20a *g,
121 struct channel_gk20a *ch, u32 sm_id, 121 struct channel_gk20a *ch, u32 sm_id,
122 struct nvgpu_gr_sm_error_state *sm_error_state); 122 struct nvgpu_gr_sm_error_state *sm_error_state);