diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 19 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | 9 |
2 files changed, 15 insertions, 13 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 815ae638..666f629e 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <nvgpu/nvgpu_mem.h> | 26 | #include <nvgpu/nvgpu_mem.h> |
27 | #include <nvgpu/acr/nvgpu_acr.h> | 27 | #include <nvgpu/acr/nvgpu_acr.h> |
28 | #include <nvgpu/firmware.h> | 28 | #include <nvgpu/firmware.h> |
29 | #include <nvgpu/pmu.h> | ||
29 | 30 | ||
30 | #include <nvgpu/linux/dma.h> | 31 | #include <nvgpu/linux/dma.h> |
31 | 32 | ||
@@ -131,7 +132,7 @@ void gm20b_init_secure_pmu(struct gpu_ops *gops) | |||
131 | static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | 132 | static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) |
132 | { | 133 | { |
133 | struct nvgpu_firmware *pmu_fw, *pmu_desc, *pmu_sig; | 134 | struct nvgpu_firmware *pmu_fw, *pmu_desc, *pmu_sig; |
134 | struct pmu_gk20a *pmu = &g->pmu; | 135 | struct nvgpu_pmu *pmu = &g->pmu; |
135 | struct lsf_ucode_desc *lsf_desc; | 136 | struct lsf_ucode_desc *lsf_desc; |
136 | int err; | 137 | int err; |
137 | gm20b_dbg_pmu("requesting PMU ucode in GM20B\n"); | 138 | gm20b_dbg_pmu("requesting PMU ucode in GM20B\n"); |
@@ -382,7 +383,7 @@ int prepare_ucode_blob(struct gk20a *g) | |||
382 | 383 | ||
383 | int err; | 384 | int err; |
384 | struct ls_flcn_mgr lsfm_l, *plsfm; | 385 | struct ls_flcn_mgr lsfm_l, *plsfm; |
385 | struct pmu_gk20a *pmu = &g->pmu; | 386 | struct nvgpu_pmu *pmu = &g->pmu; |
386 | phys_addr_t wpr_addr, wpr_page; | 387 | phys_addr_t wpr_addr, wpr_page; |
387 | u32 wprsize; | 388 | u32 wprsize; |
388 | int i; | 389 | int i; |
@@ -470,7 +471,7 @@ static u8 lsfm_falcon_disabled(struct gk20a *g, struct ls_flcn_mgr *plsfm, | |||
470 | static int lsfm_discover_ucode_images(struct gk20a *g, | 471 | static int lsfm_discover_ucode_images(struct gk20a *g, |
471 | struct ls_flcn_mgr *plsfm) | 472 | struct ls_flcn_mgr *plsfm) |
472 | { | 473 | { |
473 | struct pmu_gk20a *pmu = &g->pmu; | 474 | struct nvgpu_pmu *pmu = &g->pmu; |
474 | struct flcn_ucode_img ucode_img; | 475 | struct flcn_ucode_img ucode_img; |
475 | u32 falcon_id; | 476 | u32 falcon_id; |
476 | u32 i; | 477 | u32 i; |
@@ -555,7 +556,7 @@ static int gm20b_pmu_populate_loader_cfg(struct gk20a *g, | |||
555 | void *lsfm, u32 *p_bl_gen_desc_size) | 556 | void *lsfm, u32 *p_bl_gen_desc_size) |
556 | { | 557 | { |
557 | struct wpr_carveout_info wpr_inf; | 558 | struct wpr_carveout_info wpr_inf; |
558 | struct pmu_gk20a *pmu = &g->pmu; | 559 | struct nvgpu_pmu *pmu = &g->pmu; |
559 | struct lsfm_managed_ucode_img *p_lsfm = | 560 | struct lsfm_managed_ucode_img *p_lsfm = |
560 | (struct lsfm_managed_ucode_img *)lsfm; | 561 | (struct lsfm_managed_ucode_img *)lsfm; |
561 | struct flcn_ucode_img *p_img = &(p_lsfm->ucode_img); | 562 | struct flcn_ucode_img *p_img = &(p_lsfm->ucode_img); |
@@ -685,7 +686,7 @@ static int lsfm_fill_flcn_bl_gen_desc(struct gk20a *g, | |||
685 | struct lsfm_managed_ucode_img *pnode) | 686 | struct lsfm_managed_ucode_img *pnode) |
686 | { | 687 | { |
687 | 688 | ||
688 | struct pmu_gk20a *pmu = &g->pmu; | 689 | struct nvgpu_pmu *pmu = &g->pmu; |
689 | if (pnode->wpr_header.falcon_id != pmu->falcon_id) { | 690 | if (pnode->wpr_header.falcon_id != pmu->falcon_id) { |
690 | gm20b_dbg_pmu("non pmu. write flcn bl gen desc\n"); | 691 | gm20b_dbg_pmu("non pmu. write flcn bl gen desc\n"); |
691 | g->ops.pmu.flcn_populate_bl_dmem_desc(g, | 692 | g->ops.pmu.flcn_populate_bl_dmem_desc(g, |
@@ -842,7 +843,7 @@ static void lsfm_fill_static_lsb_hdr_info(struct gk20a *g, | |||
842 | u32 falcon_id, struct lsfm_managed_ucode_img *pnode) | 843 | u32 falcon_id, struct lsfm_managed_ucode_img *pnode) |
843 | { | 844 | { |
844 | 845 | ||
845 | struct pmu_gk20a *pmu = &g->pmu; | 846 | struct nvgpu_pmu *pmu = &g->pmu; |
846 | u32 full_app_size = 0; | 847 | u32 full_app_size = 0; |
847 | u32 data = 0; | 848 | u32 data = 0; |
848 | 849 | ||
@@ -1214,7 +1215,7 @@ int acr_ucode_patch_sig(struct gk20a *g, | |||
1214 | return 0; | 1215 | return 0; |
1215 | } | 1216 | } |
1216 | 1217 | ||
1217 | static int bl_bootstrap(struct pmu_gk20a *pmu, | 1218 | static int bl_bootstrap(struct nvgpu_pmu *pmu, |
1218 | struct flcn_bl_dmem_desc *pbl_desc, u32 bl_sz) | 1219 | struct flcn_bl_dmem_desc *pbl_desc, u32 bl_sz) |
1219 | { | 1220 | { |
1220 | struct gk20a *g = gk20a_from_pmu(pmu); | 1221 | struct gk20a *g = gk20a_from_pmu(pmu); |
@@ -1284,7 +1285,7 @@ static int bl_bootstrap(struct pmu_gk20a *pmu, | |||
1284 | 1285 | ||
1285 | int gm20b_init_nspmu_setup_hw1(struct gk20a *g) | 1286 | int gm20b_init_nspmu_setup_hw1(struct gk20a *g) |
1286 | { | 1287 | { |
1287 | struct pmu_gk20a *pmu = &g->pmu; | 1288 | struct nvgpu_pmu *pmu = &g->pmu; |
1288 | int err = 0; | 1289 | int err = 0; |
1289 | 1290 | ||
1290 | gk20a_dbg_fn(""); | 1291 | gk20a_dbg_fn(""); |
@@ -1319,7 +1320,7 @@ static int gm20b_init_pmu_setup_hw1(struct gk20a *g, | |||
1319 | void *desc, u32 bl_sz) | 1320 | void *desc, u32 bl_sz) |
1320 | { | 1321 | { |
1321 | 1322 | ||
1322 | struct pmu_gk20a *pmu = &g->pmu; | 1323 | struct nvgpu_pmu *pmu = &g->pmu; |
1323 | int err; | 1324 | int err; |
1324 | 1325 | ||
1325 | gk20a_dbg_fn(""); | 1326 | gk20a_dbg_fn(""); |
diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c index 109b3ca5..34c2c373 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | |||
@@ -15,14 +15,15 @@ | |||
15 | 15 | ||
16 | #include <soc/tegra/fuse.h> | 16 | #include <soc/tegra/fuse.h> |
17 | 17 | ||
18 | #include <nvgpu/timers.h> | ||
19 | #include <nvgpu/pmu.h> | ||
20 | |||
18 | #include "gk20a/gk20a.h" | 21 | #include "gk20a/gk20a.h" |
19 | #include "gk20a/pmu_gk20a.h" | 22 | #include "gk20a/pmu_gk20a.h" |
20 | 23 | ||
21 | #include "acr_gm20b.h" | 24 | #include "acr_gm20b.h" |
22 | #include "pmu_gm20b.h" | 25 | #include "pmu_gm20b.h" |
23 | 26 | ||
24 | #include <nvgpu/timers.h> | ||
25 | |||
26 | #include <nvgpu/hw/gm20b/hw_gr_gm20b.h> | 27 | #include <nvgpu/hw/gm20b/hw_gr_gm20b.h> |
27 | #include <nvgpu/hw/gm20b/hw_pwr_gm20b.h> | 28 | #include <nvgpu/hw/gm20b/hw_pwr_gm20b.h> |
28 | #include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> | 29 | #include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> |
@@ -138,7 +139,7 @@ static void pmu_handle_acr_init_wpr_msg(struct gk20a *g, struct pmu_msg *msg, | |||
138 | 139 | ||
139 | int gm20b_pmu_init_acr(struct gk20a *g) | 140 | int gm20b_pmu_init_acr(struct gk20a *g) |
140 | { | 141 | { |
141 | struct pmu_gk20a *pmu = &g->pmu; | 142 | struct nvgpu_pmu *pmu = &g->pmu; |
142 | struct pmu_cmd cmd; | 143 | struct pmu_cmd cmd; |
143 | u32 seq; | 144 | u32 seq; |
144 | 145 | ||
@@ -198,7 +199,7 @@ static int pmu_gm20b_ctx_wait_lsf_ready(struct gk20a *g, u32 timeout_ms, | |||
198 | 199 | ||
199 | void gm20b_pmu_load_lsf(struct gk20a *g, u32 falcon_id, u32 flags) | 200 | void gm20b_pmu_load_lsf(struct gk20a *g, u32 falcon_id, u32 flags) |
200 | { | 201 | { |
201 | struct pmu_gk20a *pmu = &g->pmu; | 202 | struct nvgpu_pmu *pmu = &g->pmu; |
202 | struct pmu_cmd cmd; | 203 | struct pmu_cmd cmd; |
203 | u32 seq; | 204 | u32 seq; |
204 | 205 | ||