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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/fifo_gm20b.c15
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c5
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c3
-rw-r--r--drivers/gpu/nvgpu/gm20b/hw_proj_gm20b.h4
-rw-r--r--drivers/gpu/nvgpu/gm20b/hw_top_gm20b.h16
5 files changed, 36 insertions, 7 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
index bb873bcc..031c5bae 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
@@ -49,12 +49,14 @@ static void channel_gm20b_bind(struct channel_gk20a *c)
49static inline u32 gm20b_engine_id_to_mmu_id(struct gk20a *g, u32 engine_id) 49static inline u32 gm20b_engine_id_to_mmu_id(struct gk20a *g, u32 engine_id)
50{ 50{
51 u32 fault_id = ~0; 51 u32 fault_id = ~0;
52 struct fifo_engine_info_gk20a *engine_info;
52 53
53 if (engine_id < ENGINE_INVAL_GK20A) { 54 engine_info = gk20a_fifo_get_engine_info(g, engine_id);
54 struct fifo_engine_info_gk20a *info =
55 &g->fifo.engine_info[engine_id];
56 55
57 fault_id = info->fault_id; 56 if (engine_info) {
57 fault_id = engine_info->fault_id;
58 } else {
59 gk20a_err(g->dev, "engine_id is not in active list/invalid %d", engine_id);
58 } 60 }
59 return fault_id; 61 return fault_id;
60} 62}
@@ -72,7 +74,7 @@ static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g,
72 for_each_set_bit(engine_id, &engine_ids, 32) { 74 for_each_set_bit(engine_id, &engine_ids, 32) {
73 u32 engine_mmu_fault_id; 75 u32 engine_mmu_fault_id;
74 76
75 if (engine_id > g->fifo.max_engines) { 77 if (!gk20a_fifo_is_valid_engine_id(g, engine_id)) {
76 gk20a_err(dev_from_gk20a(g), 78 gk20a_err(dev_from_gk20a(g),
77 "faulting unknown engine %ld", engine_id); 79 "faulting unknown engine %ld", engine_id);
78 } else { 80 } else {
@@ -109,7 +111,7 @@ static u32 gm20b_fifo_get_num_fifos(struct gk20a *g)
109 return ccsr_channel__size_1_v(); 111 return ccsr_channel__size_1_v();
110} 112}
111 113
112void gm20b_device_info_data_parse(struct gk20a *g, 114static void gm20b_device_info_data_parse(struct gk20a *g,
113 u32 table_entry, u32 *inst_id, 115 u32 table_entry, u32 *inst_id,
114 u32 *pri_base, u32 *fault_id) 116 u32 *pri_base, u32 *fault_id)
115{ 117{
@@ -152,4 +154,5 @@ void gm20b_init_fifo(struct gpu_ops *gops)
152 gops->fifo.force_reset_ch = gk20a_fifo_force_reset_ch; 154 gops->fifo.force_reset_ch = gk20a_fifo_force_reset_ch;
153 gops->fifo.engine_enum_from_type = gk20a_fifo_engine_enum_from_type; 155 gops->fifo.engine_enum_from_type = gk20a_fifo_engine_enum_from_type;
154 gops->fifo.device_info_data_parse = gm20b_device_info_data_parse; 156 gops->fifo.device_info_data_parse = gm20b_device_info_data_parse;
157 gops->fifo.eng_runlist_base_size = fifo_eng_runlist_base__size_1_v;
155} 158}
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index d5131b7a..cc709c78 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -855,6 +855,9 @@ static int gr_gm20b_dump_gr_status_regs(struct gk20a *g,
855 struct gk20a_debug_output *o) 855 struct gk20a_debug_output *o)
856{ 856{
857 struct gr_gk20a *gr = &g->gr; 857 struct gr_gk20a *gr = &g->gr;
858 u32 gr_engine_id;
859
860 gr_engine_id = gk20a_fifo_get_gr_engine_id(g);
858 861
859 gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n", 862 gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n",
860 gk20a_readl(g, gr_status_r())); 863 gk20a_readl(g, gr_status_r()));
@@ -875,7 +878,7 @@ static int gr_gm20b_dump_gr_status_regs(struct gk20a *g,
875 gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n", 878 gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR : 0x%x\n",
876 gk20a_readl(g, gr_fecs_intr_r())); 879 gk20a_readl(g, gr_fecs_intr_r()));
877 gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n", 880 gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n",
878 gk20a_readl(g, fifo_engine_status_r(ENGINE_GR_GK20A))); 881 gk20a_readl(g, fifo_engine_status_r(gr_engine_id)));
879 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n", 882 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n",
880 gk20a_readl(g, gr_activity_0_r())); 883 gk20a_readl(g, gr_activity_0_r()));
881 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n", 884 gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n",
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index c0113498..cbd3f50b 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -140,6 +140,9 @@ static int gm20b_get_litter_value(struct gk20a *g,
140 case GPU_LIT_ROP_SHARED_BASE: 140 case GPU_LIT_ROP_SHARED_BASE:
141 ret = proj_rop_shared_base_v(); 141 ret = proj_rop_shared_base_v();
142 break; 142 break;
143 case GPU_LIT_HOST_NUM_ENGINES:
144 ret = proj_host_num_engines_v();
145 break;
143 case GPU_LIT_HOST_NUM_PBDMA: 146 case GPU_LIT_HOST_NUM_PBDMA:
144 ret = proj_host_num_pbdma_v(); 147 ret = proj_host_num_pbdma_v();
145 break; 148 break;
diff --git a/drivers/gpu/nvgpu/gm20b/hw_proj_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_proj_gm20b.h
index b837918c..d4d412e1 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_proj_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_proj_gm20b.h
@@ -106,6 +106,10 @@ static inline u32 proj_tpc_in_gpc_shared_base_v(void)
106{ 106{
107 return 0x00001800; 107 return 0x00001800;
108} 108}
109static inline u32 proj_host_num_engines_v(void)
110{
111 return 0x00000002;
112}
109static inline u32 proj_host_num_pbdma_v(void) 113static inline u32 proj_host_num_pbdma_v(void)
110{ 114{
111 return 0x00000001; 115 return 0x00000001;
diff --git a/drivers/gpu/nvgpu/gm20b/hw_top_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_top_gm20b.h
index c70f388c..cca37294 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_top_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_top_gm20b.h
@@ -138,6 +138,22 @@ static inline u32 top_device_info_type_enum_graphics_f(void)
138{ 138{
139 return 0x0; 139 return 0x0;
140} 140}
141static inline u32 top_device_info_type_enum_copy0_v(void)
142{
143 return 0x00000001;
144}
145static inline u32 top_device_info_type_enum_copy0_f(void)
146{
147 return 0x4;
148}
149static inline u32 top_device_info_type_enum_copy1_v(void)
150{
151 return 0x00000002;
152}
153static inline u32 top_device_info_type_enum_copy1_f(void)
154{
155 return 0x8;
156}
141static inline u32 top_device_info_type_enum_copy2_v(void) 157static inline u32 top_device_info_type_enum_copy2_v(void)
142{ 158{
143 return 0x00000003; 159 return 0x00000003;