diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/bus_gm20b.c | 64 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/bus_gm20b.h | 23 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/mm_gm20b.c | 34 |
4 files changed, 89 insertions, 35 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/bus_gm20b.c b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c new file mode 100644 index 00000000..68a4b15f --- /dev/null +++ b/drivers/gpu/nvgpu/gm20b/bus_gm20b.c | |||
@@ -0,0 +1,64 @@ | |||
1 | /* | ||
2 | * GM20B MMU | ||
3 | * | ||
4 | * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | |||
16 | #include <linux/delay.h> | ||
17 | |||
18 | #include <nvgpu/timers.h> | ||
19 | |||
20 | #include "bus_gm20b.h" | ||
21 | #include "gk20a/gk20a.h" | ||
22 | #include "gk20a/bus_gk20a.h" | ||
23 | |||
24 | #include <nvgpu/hw/gm20b/hw_bus_gm20b.h> | ||
25 | |||
26 | static int gm20b_bus_bar1_bind(struct gk20a *g, struct mem_desc *bar1_inst) | ||
27 | { | ||
28 | struct nvgpu_timeout timeout; | ||
29 | int err = 0; | ||
30 | u64 iova = gk20a_mm_inst_block_addr(g, bar1_inst); | ||
31 | u32 ptr_v = (u32)(iova >> bar1_instance_block_shift_gk20a()); | ||
32 | |||
33 | gk20a_dbg_info("bar1 inst block ptr: 0x%08x", ptr_v); | ||
34 | |||
35 | gk20a_writel(g, bus_bar1_block_r(), | ||
36 | gk20a_aperture_mask(g, bar1_inst, | ||
37 | bus_bar1_block_target_sys_mem_ncoh_f(), | ||
38 | bus_bar1_block_target_vid_mem_f()) | | ||
39 | bus_bar1_block_mode_virtual_f() | | ||
40 | bus_bar1_block_ptr_f(ptr_v)); | ||
41 | nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER); | ||
42 | do { | ||
43 | u32 val = gk20a_readl(g, bus_bind_status_r()); | ||
44 | u32 pending = bus_bind_status_bar1_pending_v(val); | ||
45 | u32 outstanding = bus_bind_status_bar1_outstanding_v(val); | ||
46 | if (!pending && !outstanding) | ||
47 | break; | ||
48 | |||
49 | udelay(5); | ||
50 | } while (!nvgpu_timeout_expired(&timeout)); | ||
51 | |||
52 | if (nvgpu_timeout_peek_expired(&timeout)) | ||
53 | err = -EINVAL; | ||
54 | |||
55 | return err; | ||
56 | } | ||
57 | |||
58 | void gm20b_init_bus(struct gpu_ops *gops) | ||
59 | { | ||
60 | gops->bus.init_hw = gk20a_bus_init_hw; | ||
61 | gops->bus.isr = gk20a_bus_isr; | ||
62 | gops->bus.read_ptimer = gk20a_read_ptimer; | ||
63 | gops->bus.bar1_bind = gm20b_bus_bar1_bind; | ||
64 | } | ||
diff --git a/drivers/gpu/nvgpu/gm20b/bus_gm20b.h b/drivers/gpu/nvgpu/gm20b/bus_gm20b.h new file mode 100644 index 00000000..853e50a6 --- /dev/null +++ b/drivers/gpu/nvgpu/gm20b/bus_gm20b.h | |||
@@ -0,0 +1,23 @@ | |||
1 | /* | ||
2 | * GM20B BUS | ||
3 | * | ||
4 | * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef _NVGPU_GM20B_BUS | ||
17 | #define _NVGPU_GM20B_BUS | ||
18 | |||
19 | struct gpu_ops; | ||
20 | |||
21 | void gm20b_init_bus(struct gpu_ops *gops); | ||
22 | |||
23 | #endif | ||
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index ad041f67..684f5731 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include "gk20a/gk20a.h" | 18 | #include "gk20a/gk20a.h" |
19 | #include "gk20a/dbg_gpu_gk20a.h" | 19 | #include "gk20a/dbg_gpu_gk20a.h" |
20 | #include "gk20a/css_gr_gk20a.h" | 20 | #include "gk20a/css_gr_gk20a.h" |
21 | #include "gk20a/bus_gk20a.h" | ||
21 | 22 | ||
22 | #include "ltc_gm20b.h" | 23 | #include "ltc_gm20b.h" |
23 | #include "ce2_gm20b.h" | 24 | #include "ce2_gm20b.h" |
@@ -215,6 +216,7 @@ int gm20b_init_hal(struct gk20a *g) | |||
215 | } | 216 | } |
216 | } | 217 | } |
217 | #endif | 218 | #endif |
219 | gk20a_init_bus(gops); | ||
218 | gm20b_init_mc(gops); | 220 | gm20b_init_mc(gops); |
219 | gm20b_init_ltc(gops); | 221 | gm20b_init_ltc(gops); |
220 | gm20b_init_gr(gops); | 222 | gm20b_init_gr(gops); |
@@ -238,7 +240,6 @@ int gm20b_init_hal(struct gk20a *g) | |||
238 | gops->name = "gm20b"; | 240 | gops->name = "gm20b"; |
239 | gops->chip_init_gpu_characteristics = gk20a_init_gpu_characteristics; | 241 | gops->chip_init_gpu_characteristics = gk20a_init_gpu_characteristics; |
240 | gops->get_litter_value = gm20b_get_litter_value; | 242 | gops->get_litter_value = gm20b_get_litter_value; |
241 | gops->read_ptimer = gk20a_read_ptimer; | ||
242 | 243 | ||
243 | c->twod_class = FERMI_TWOD_A; | 244 | c->twod_class = FERMI_TWOD_A; |
244 | c->threed_class = MAXWELL_B; | 245 | c->threed_class = MAXWELL_B; |
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c index 18f9eec1..949a5c5d 100644 --- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c | |||
@@ -13,17 +13,12 @@ | |||
13 | * more details. | 13 | * more details. |
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/delay.h> | ||
17 | |||
18 | #include "gk20a/gk20a.h" | 16 | #include "gk20a/gk20a.h" |
19 | 17 | ||
20 | #include "mm_gm20b.h" | 18 | #include "mm_gm20b.h" |
21 | 19 | ||
22 | #include <nvgpu/timers.h> | ||
23 | |||
24 | #include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h> | 20 | #include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h> |
25 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> | 21 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> |
26 | #include <nvgpu/hw/gm20b/hw_bus_gm20b.h> | ||
27 | 22 | ||
28 | static void gm20b_mm_set_big_page_size(struct gk20a *g, | 23 | static void gm20b_mm_set_big_page_size(struct gk20a *g, |
29 | struct mem_desc *mem, int size) | 24 | struct mem_desc *mem, int size) |
@@ -55,34 +50,6 @@ static bool gm20b_mm_support_sparse(struct gk20a *g) | |||
55 | return true; | 50 | return true; |
56 | } | 51 | } |
57 | 52 | ||
58 | static int gm20b_mm_bar1_bind(struct gk20a *g, struct mem_desc *bar1_inst) | ||
59 | { | ||
60 | int retry = 1000; | ||
61 | u64 iova = gk20a_mm_inst_block_addr(g, bar1_inst); | ||
62 | u32 ptr_v = (u32)(iova >> bar1_instance_block_shift_gk20a()); | ||
63 | |||
64 | gk20a_dbg_info("bar1 inst block ptr: 0x%08x", ptr_v); | ||
65 | |||
66 | gk20a_writel(g, bus_bar1_block_r(), | ||
67 | gk20a_aperture_mask(g, bar1_inst, | ||
68 | bus_bar1_block_target_sys_mem_ncoh_f(), | ||
69 | bus_bar1_block_target_vid_mem_f()) | | ||
70 | bus_bar1_block_mode_virtual_f() | | ||
71 | bus_bar1_block_ptr_f(ptr_v)); | ||
72 | do { | ||
73 | u32 val = gk20a_readl(g, bus_bind_status_r()); | ||
74 | u32 pending = bus_bind_status_bar1_pending_v(val); | ||
75 | u32 outstanding = bus_bind_status_bar1_outstanding_v(val); | ||
76 | if (!pending && !outstanding) | ||
77 | break; | ||
78 | |||
79 | udelay(5); | ||
80 | retry--; | ||
81 | } while (retry >= 0 || !tegra_platform_is_silicon()); | ||
82 | |||
83 | return retry ? -EINVAL : 0; | ||
84 | } | ||
85 | |||
86 | static bool gm20b_mm_is_bar1_supported(struct gk20a *g) | 53 | static bool gm20b_mm_is_bar1_supported(struct gk20a *g) |
87 | { | 54 | { |
88 | return true; | 55 | return true; |
@@ -107,7 +74,6 @@ void gm20b_init_mm(struct gpu_ops *gops) | |||
107 | gops->mm.get_mmu_levels = gk20a_mm_get_mmu_levels; | 74 | gops->mm.get_mmu_levels = gk20a_mm_get_mmu_levels; |
108 | gops->mm.init_pdb = gk20a_mm_init_pdb; | 75 | gops->mm.init_pdb = gk20a_mm_init_pdb; |
109 | gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw; | 76 | gops->mm.init_mm_setup_hw = gk20a_init_mm_setup_hw; |
110 | gops->mm.bar1_bind = gm20b_mm_bar1_bind; | ||
111 | gops->mm.is_bar1_supported = gm20b_mm_is_bar1_supported; | 77 | gops->mm.is_bar1_supported = gm20b_mm_is_bar1_supported; |
112 | gops->mm.init_inst_block = gk20a_init_inst_block; | 78 | gops->mm.init_inst_block = gk20a_init_inst_block; |
113 | gops->mm.mmu_fault_pending = gk20a_fifo_mmu_fault_pending; | 79 | gops->mm.mmu_fault_pending = gk20a_fifo_mmu_fault_pending; |