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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.c6
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.h18
2 files changed, 3 insertions, 21 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index ea4500eb..1f78749c 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -1058,7 +1058,7 @@ int gm20b_bootstrap_hs_flcn(struct gk20a *g)
1058 u32 img_size_in_bytes = 0; 1058 u32 img_size_in_bytes = 0;
1059 u32 status, size; 1059 u32 status, size;
1060 u64 start; 1060 u64 start;
1061 struct acr_gm20b *acr = &g->acr; 1061 struct acr_desc *acr = &g->acr;
1062 const struct firmware *acr_fw = acr->acr_fw; 1062 const struct firmware *acr_fw = acr->acr_fw;
1063 struct flcn_bl_dmem_desc *bl_dmem_desc = &acr->bl_dmem_desc; 1063 struct flcn_bl_dmem_desc *bl_dmem_desc = &acr->bl_dmem_desc;
1064 u32 *acr_ucode_header_t210_load; 1064 u32 *acr_ucode_header_t210_load;
@@ -1204,7 +1204,7 @@ static int bl_bootstrap(struct pmu_gk20a *pmu,
1204 struct flcn_bl_dmem_desc *pbl_desc, u32 bl_sz) 1204 struct flcn_bl_dmem_desc *pbl_desc, u32 bl_sz)
1205{ 1205{
1206 struct gk20a *g = gk20a_from_pmu(pmu); 1206 struct gk20a *g = gk20a_from_pmu(pmu);
1207 struct acr_gm20b *acr = &g->acr; 1207 struct acr_desc *acr = &g->acr;
1208 struct mm_gk20a *mm = &g->mm; 1208 struct mm_gk20a *mm = &g->mm;
1209 u32 imem_dst_blk = 0; 1209 u32 imem_dst_blk = 0;
1210 u32 virt_addr = 0; 1210 u32 virt_addr = 0;
@@ -1375,7 +1375,7 @@ int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt)
1375 struct device *d = dev_from_gk20a(g); 1375 struct device *d = dev_from_gk20a(g);
1376 int err = 0; 1376 int err = 0;
1377 u32 bl_sz; 1377 u32 bl_sz;
1378 struct acr_gm20b *acr = &g->acr; 1378 struct acr_desc *acr = &g->acr;
1379 const struct firmware *hsbl_fw = acr->hsbl_fw; 1379 const struct firmware *hsbl_fw = acr->hsbl_fw;
1380 struct hsflcn_bl_desc *pmu_bl_gm10x_desc; 1380 struct hsflcn_bl_desc *pmu_bl_gm10x_desc;
1381 u32 *pmu_bl_gm10x = NULL; 1381 u32 *pmu_bl_gm10x = NULL;
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
index 179345b9..a1dceae9 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
@@ -386,24 +386,6 @@ struct acr_fw_header {
386 u32 hdr_size; /*size of above header*/ 386 u32 hdr_size; /*size of above header*/
387}; 387};
388 388
389struct acr_gm20b {
390 struct mem_desc ucode_blob;
391 struct bin_hdr *bl_bin_hdr;
392 struct hsflcn_bl_desc *pmu_hsbl_desc;
393 struct bin_hdr *hsbin_hdr;
394 struct acr_fw_header *fw_hdr;
395 u32 pmu_args;
396 const struct firmware *acr_fw;
397 struct flcn_acr_desc *acr_dmem_desc;
398 struct mem_desc acr_ucode;
399 const struct firmware *hsbl_fw;
400 struct mem_desc hsbl_ucode;
401 struct flcn_bl_dmem_desc bl_dmem_desc;
402 const struct firmware *pmu_fw;
403 const struct firmware *pmu_desc;
404 u32 capabilities;
405};
406
407void gm20b_init_secure_pmu(struct gpu_ops *gops); 389void gm20b_init_secure_pmu(struct gpu_ops *gops);
408int prepare_ucode_blob(struct gk20a *g); 390int prepare_ucode_blob(struct gk20a *g);
409int gm20b_pmu_setup_sw(struct gk20a *g); 391int gm20b_pmu_setup_sw(struct gk20a *g);