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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hal_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index c978f9aa..0865ace4 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GM20B Graphics 2 * GM20B Graphics
3 * 3 *
4 * Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -277,6 +277,7 @@ static const struct gpu_ops gm20b_ops = {
277 .get_lrf_tex_ltc_dram_override = NULL, 277 .get_lrf_tex_ltc_dram_override = NULL,
278 .update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode, 278 .update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode,
279 .update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode, 279 .update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode,
280 .set_mmu_debug_mode = gm20b_gr_set_mmu_debug_mode,
280 .record_sm_error_state = gm20b_gr_record_sm_error_state, 281 .record_sm_error_state = gm20b_gr_record_sm_error_state,
281 .clear_sm_error_state = gm20b_gr_clear_sm_error_state, 282 .clear_sm_error_state = gm20b_gr_clear_sm_error_state,
282 .suspend_contexts = gr_gk20a_suspend_contexts, 283 .suspend_contexts = gr_gk20a_suspend_contexts,
@@ -753,6 +754,7 @@ int gm20b_init_hal(struct gk20a *g)
753 __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); 754 __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true);
754 __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); 755 __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
755 __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false); 756 __nvgpu_set_enabled(g, NVGPU_FECS_TRACE_FEATURE_CONTROL, false);
757 __nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, false);
756 758
757 /* Read fuses to check if gpu needs to boot in secure/non-secure mode */ 759 /* Read fuses to check if gpu needs to boot in secure/non-secure mode */
758 if (gops->fuse.check_priv_security(g)) { 760 if (gops->fuse.check_priv_security(g)) {