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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index d00181af..dacef784 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1468,10 +1468,15 @@ int gm20b_gr_set_mmu_debug_mode(struct gk20a *g,
1468 gr_gpcs_pri_mmu_debug_ctrl_debug_disabled_f(), 1468 gr_gpcs_pri_mmu_debug_ctrl_debug_disabled_f(),
1469 }; 1469 };
1470 int err; 1470 int err;
1471 struct tsg_gk20a *tsg = tsg_gk20a_from_ch(ch);
1472
1473 if (tsg == NULL) {
1474 return enable ? -EINVAL : 0;
1475 }
1471 1476
1472 err = gr_gk20a_exec_ctx_ops(ch, &ctx_ops, 1, 1, 0, NULL); 1477 err = gr_gk20a_exec_ctx_ops(ch, &ctx_ops, 1, 1, 0, NULL);
1473 if (err != 0) { 1478 if (err != 0) {
1474 nvgpu_err(g, "Failed to access register"); 1479 nvgpu_err(g, "update MMU debug mode failed");
1475 } 1480 }
1476 return err; 1481 return err;
1477} 1482}