summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index f60d880d..87cf3f01 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -548,18 +548,18 @@ static u32 gr_gm20b_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
548 548
549static void gr_gm20b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index) 549static void gr_gm20b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
550{ 550{
551 nvgpu_tegra_fuse_write_bypass(0x1); 551 nvgpu_tegra_fuse_write_bypass(g, 0x1);
552 nvgpu_tegra_fuse_write_access_sw(0x0); 552 nvgpu_tegra_fuse_write_access_sw(g, 0x0);
553 553
554 if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) { 554 if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) {
555 nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(0x0); 555 nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x0);
556 nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(0x1); 556 nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(g, 0x1);
557 } else if (g->gr.gpc_tpc_mask[gpc_index] == 0x2) { 557 } else if (g->gr.gpc_tpc_mask[gpc_index] == 0x2) {
558 nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(0x1); 558 nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x1);
559 nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(0x0); 559 nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(g, 0x0);
560 } else { 560 } else {
561 nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(0x0); 561 nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x0);
562 nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(0x0); 562 nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(g, 0x0);
563 } 563 }
564} 564}
565 565