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path: root/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c451
1 files changed, 425 insertions, 26 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c b/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c
index 6b8648d3..fc4a94b9 100644
--- a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c
+++ b/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * drivers/video/tegra/host/gm20b/gm20b_gating_reglist.c
3 *
4 * Copyright (c) 2014, NVIDIA Corporation. All rights reserved. 2 * Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
5 * 3 *
6 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
@@ -31,6 +29,40 @@ struct gating_desc {
31 u32 prod; 29 u32 prod;
32 u32 disable; 30 u32 disable;
33}; 31};
32/* slcg bus */
33const struct gating_desc gm20b_slcg_bus[] = {
34 {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe},
35};
36
37/* slcg ce2 */
38const struct gating_desc gm20b_slcg_ce2[] = {
39 {.addr = 0x00106f28, .prod = 0x00000000, .disable = 0x000007fe},
40};
41
42/* slcg chiplet */
43const struct gating_desc gm20b_slcg_chiplet[] = {
44 {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007},
45 {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007},
46 {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007},
47 {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007},
48};
49
50/* slcg ctxsw firmware */
51const struct gating_desc gm20b_slcg_ctxsw_firmware[] = {
52 {.addr = 0x00005f00, .prod = 0x00020008, .disable = 0x0003fffe},
53};
54
55/* slcg fb */
56const struct gating_desc gm20b_slcg_fb[] = {
57 {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe},
58 {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe},
59};
60
61/* slcg fifo */
62const struct gating_desc gm20b_slcg_fifo[] = {
63 {.addr = 0x000026ac, .prod = 0x00000100, .disable = 0x0001fffe},
64};
65
34/* slcg gr */ 66/* slcg gr */
35const struct gating_desc gm20b_slcg_gr[] = { 67const struct gating_desc gm20b_slcg_gr[] = {
36 {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x03fffffe}, 68 {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x03fffffe},
@@ -74,8 +106,8 @@ const struct gating_desc gm20b_slcg_gr[] = {
74 {.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe}, 106 {.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe},
75 {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e}, 107 {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e},
76 {.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe}, 108 {.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe},
77 {.addr = 0x00419fdc, .prod = 0xfffffffe, .disable = 0xfffffffe}, 109 {.addr = 0x00419fdc, .prod = 0xffedff00, .disable = 0xfffffffe},
78 {.addr = 0x00419fe4, .prod = 0x00000000, .disable = 0x00001ffe}, 110 {.addr = 0x00419fe4, .prod = 0x00001b00, .disable = 0x00001ffe},
79 {.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe}, 111 {.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe},
80 {.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe}, 112 {.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe},
81 {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe}, 113 {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe},
@@ -93,6 +125,12 @@ const struct gating_desc gm20b_slcg_gr[] = {
93 {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000001ff}, 125 {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000001ff},
94}; 126};
95 127
128/* slcg ltc */
129const struct gating_desc gm20b_slcg_ltc[] = {
130 {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe},
131 {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe},
132};
133
96/* slcg perf */ 134/* slcg perf */
97const struct gating_desc gm20b_slcg_perf[] = { 135const struct gating_desc gm20b_slcg_perf[] = {
98 {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000}, 136 {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000},
@@ -101,6 +139,62 @@ const struct gating_desc gm20b_slcg_perf[] = {
101 {.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000}, 139 {.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000},
102}; 140};
103 141
142/* slcg PriRing */
143const struct gating_desc gm20b_slcg_priring[] = {
144 {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001},
145};
146
147/* slcg pwr_csb */
148const struct gating_desc gm20b_slcg_pwr_csb[] = {
149 {.addr = 0x0000017c, .prod = 0x00020008, .disable = 0x0003fffe},
150 {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f},
151 {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe},
152 {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f},
153};
154
155/* slcg pmu */
156const struct gating_desc gm20b_slcg_pmu[] = {
157 {.addr = 0x0010a17c, .prod = 0x00020008, .disable = 0x0003fffe},
158 {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe},
159 {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f},
160};
161
162/* therm gr */
163const struct gating_desc gm20b_slcg_therm[] = {
164 {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f},
165};
166
167/* slcg Xbar */
168const struct gating_desc gm20b_slcg_xbar[] = {
169 {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe},
170 {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe},
171};
172
173/* blcg bus */
174const struct gating_desc gm20b_blcg_bus[] = {
175 {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000},
176};
177
178/* blcg ctxsw firmware */
179const struct gating_desc gm20b_blcg_ctxsw_firmware[] = {
180 {.addr = 0x00022400, .prod = 0x00000000, .disable = 0x00000000},
181};
182
183/* blcg fb */
184const struct gating_desc gm20b_blcg_fb[] = {
185 {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000},
186 {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000},
187 {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000},
188 {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000},
189 {.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000},
190 {.addr = 0x00100c98, .prod = 0x00000242, .disable = 0x00000000},
191};
192
193/* blcg fifo */
194const struct gating_desc gm20b_blcg_fifo[] = {
195 {.addr = 0x000026a4, .prod = 0x0000c242, .disable = 0x00000000},
196};
197
104/* blcg gr */ 198/* blcg gr */
105const struct gating_desc gm20b_blcg_gr[] = { 199const struct gating_desc gm20b_blcg_gr[] = {
106 {.addr = 0x004041f0, .prod = 0x00004046, .disable = 0x00000000}, 200 {.addr = 0x004041f0, .prod = 0x00004046, .disable = 0x00000000},
@@ -143,11 +237,11 @@ const struct gating_desc gm20b_blcg_gr[] = {
143 {.addr = 0x00419cd4, .prod = 0x00000002, .disable = 0x00000000}, 237 {.addr = 0x00419cd4, .prod = 0x00000002, .disable = 0x00000000},
144 {.addr = 0x00419cdc, .prod = 0x00000002, .disable = 0x00000000}, 238 {.addr = 0x00419cdc, .prod = 0x00000002, .disable = 0x00000000},
145 {.addr = 0x00419c70, .prod = 0x00004044, .disable = 0x00000000}, 239 {.addr = 0x00419c70, .prod = 0x00004044, .disable = 0x00000000},
146 {.addr = 0x00419fd0, .prod = 0x00000044, .disable = 0x00000000}, 240 {.addr = 0x00419fd0, .prod = 0x00004044, .disable = 0x00000000},
147 {.addr = 0x00419fd8, .prod = 0x00000045, .disable = 0x00000000}, 241 {.addr = 0x00419fd8, .prod = 0x00004046, .disable = 0x00000000},
148 {.addr = 0x00419fe0, .prod = 0x00000044, .disable = 0x00000000}, 242 {.addr = 0x00419fe0, .prod = 0x00004044, .disable = 0x00000000},
149 {.addr = 0x00419fe8, .prod = 0x00000042, .disable = 0x00000000}, 243 {.addr = 0x00419fe8, .prod = 0x00000042, .disable = 0x00000000},
150 {.addr = 0x00419ff0, .prod = 0x00000045, .disable = 0x00000000}, 244 {.addr = 0x00419ff0, .prod = 0x00004045, .disable = 0x00000000},
151 {.addr = 0x00419ff8, .prod = 0x00000002, .disable = 0x00000000}, 245 {.addr = 0x00419ff8, .prod = 0x00000002, .disable = 0x00000000},
152 {.addr = 0x00419f90, .prod = 0x00000002, .disable = 0x00000000}, 246 {.addr = 0x00419f90, .prod = 0x00000002, .disable = 0x00000000},
153 {.addr = 0x0041be28, .prod = 0x00000042, .disable = 0x00000000}, 247 {.addr = 0x0041be28, .prod = 0x00000042, .disable = 0x00000000},
@@ -166,16 +260,126 @@ const struct gating_desc gm20b_blcg_gr[] = {
166 {.addr = 0x004089b8, .prod = 0x00004042, .disable = 0x00000000}, 260 {.addr = 0x004089b8, .prod = 0x00004042, .disable = 0x00000000},
167}; 261};
168 262
263/* blcg ltc */
264const struct gating_desc gm20b_blcg_ltc[] = {
265 {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000},
266 {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000},
267 {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000},
268 {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000},
269};
270
271/* blcg pwr_csb */
272const struct gating_desc gm20b_blcg_pwr_csb[] = {
273 {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000},
274};
275
276/* blcg pmu */
277const struct gating_desc gm20b_blcg_pmu[] = {
278 {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000},
279};
280
281/* blcg Xbar */
282const struct gating_desc gm20b_blcg_xbar[] = {
283 {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000},
284 {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000},
285};
286
169/* pg gr */ 287/* pg gr */
170const struct gating_desc gm20b_pg_gr[] = { 288const struct gating_desc gm20b_pg_gr[] = {
171}; 289};
172 290
173/* therm gr */ 291/* static inline functions */
174const struct gating_desc gm20b_slcg_therm[] = { 292void gm20b_slcg_bus_load_gating_prod(struct gk20a *g,
175 {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f}, 293 bool prod)
176}; 294{
295 u32 i;
296 u32 size = sizeof(gm20b_slcg_bus) / sizeof(struct gating_desc);
297 for (i = 0; i < size; i++) {
298 if (prod)
299 gk20a_writel(g, gm20b_slcg_bus[i].addr,
300 gm20b_slcg_bus[i].prod);
301 else
302 gk20a_writel(g, gm20b_slcg_bus[i].addr,
303 gm20b_slcg_bus[i].disable);
304 }
305}
177 306
178/* static inline functions */ 307/* static inline functions */
308void gm20b_slcg_ce2_load_gating_prod(struct gk20a *g,
309 bool prod)
310{
311 u32 i;
312 u32 size = sizeof(gm20b_slcg_ce2) / sizeof(struct gating_desc);
313 for (i = 0; i < size; i++) {
314 if (prod)
315 gk20a_writel(g, gm20b_slcg_ce2[i].addr,
316 gm20b_slcg_ce2[i].prod);
317 else
318 gk20a_writel(g, gm20b_slcg_ce2[i].addr,
319 gm20b_slcg_ce2[i].disable);
320 }
321}
322
323void gm20b_slcg_chiplet_load_gating_prod(struct gk20a *g,
324 bool prod)
325{
326 u32 i;
327 u32 size = sizeof(gm20b_slcg_chiplet) / sizeof(struct gating_desc);
328 for (i = 0; i < size; i++) {
329 if (prod)
330 gk20a_writel(g, gm20b_slcg_chiplet[i].addr,
331 gm20b_slcg_chiplet[i].prod);
332 else
333 gk20a_writel(g, gm20b_slcg_chiplet[i].addr,
334 gm20b_slcg_chiplet[i].disable);
335 }
336}
337
338void gm20b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
339 bool prod)
340{
341 u32 i;
342 u32 size = sizeof(gm20b_slcg_ctxsw_firmware) / sizeof(struct gating_desc);
343 for (i = 0; i < size; i++) {
344 if (prod)
345 gk20a_writel(g, gm20b_slcg_ctxsw_firmware[i].addr,
346 gm20b_slcg_ctxsw_firmware[i].prod);
347 else
348 gk20a_writel(g, gm20b_slcg_ctxsw_firmware[i].addr,
349 gm20b_slcg_ctxsw_firmware[i].disable);
350 }
351}
352
353void gm20b_slcg_fb_load_gating_prod(struct gk20a *g,
354 bool prod)
355{
356 u32 i;
357 u32 size = sizeof(gm20b_slcg_fb) / sizeof(struct gating_desc);
358 for (i = 0; i < size; i++) {
359 if (prod)
360 gk20a_writel(g, gm20b_slcg_fb[i].addr,
361 gm20b_slcg_fb[i].prod);
362 else
363 gk20a_writel(g, gm20b_slcg_fb[i].addr,
364 gm20b_slcg_fb[i].disable);
365 }
366}
367
368void gm20b_slcg_fifo_load_gating_prod(struct gk20a *g,
369 bool prod)
370{
371 u32 i;
372 u32 size = sizeof(gm20b_slcg_fifo) / sizeof(struct gating_desc);
373 for (i = 0; i < size; i++) {
374 if (prod)
375 gk20a_writel(g, gm20b_slcg_fifo[i].addr,
376 gm20b_slcg_fifo[i].prod);
377 else
378 gk20a_writel(g, gm20b_slcg_fifo[i].addr,
379 gm20b_slcg_fifo[i].disable);
380 }
381}
382
179void gr_gm20b_slcg_gr_load_gating_prod(struct gk20a *g, 383void gr_gm20b_slcg_gr_load_gating_prod(struct gk20a *g,
180 bool prod) 384 bool prod)
181{ 385{
@@ -191,7 +395,22 @@ void gr_gm20b_slcg_gr_load_gating_prod(struct gk20a *g,
191 } 395 }
192} 396}
193 397
194void gr_gm20b_slcg_perf_load_gating_prod(struct gk20a *g, 398void ltc_gm20b_slcg_ltc_load_gating_prod(struct gk20a *g,
399 bool prod)
400{
401 u32 i;
402 u32 size = sizeof(gm20b_slcg_ltc) / sizeof(struct gating_desc);
403 for (i = 0; i < size; i++) {
404 if (prod)
405 gk20a_writel(g, gm20b_slcg_ltc[i].addr,
406 gm20b_slcg_ltc[i].prod);
407 else
408 gk20a_writel(g, gm20b_slcg_ltc[i].addr,
409 gm20b_slcg_ltc[i].disable);
410 }
411}
412
413void gm20b_slcg_perf_load_gating_prod(struct gk20a *g,
195 bool prod) 414 bool prod)
196{ 415{
197 u32 i; 416 u32 i;
@@ -206,37 +425,52 @@ void gr_gm20b_slcg_perf_load_gating_prod(struct gk20a *g,
206 } 425 }
207} 426}
208 427
209void gr_gm20b_blcg_gr_load_gating_prod(struct gk20a *g, 428void gm20b_slcg_priring_load_gating_prod(struct gk20a *g,
210 bool prod) 429 bool prod)
211{ 430{
212 u32 i; 431 u32 i;
213 u32 size = sizeof(gm20b_blcg_gr) / sizeof(struct gating_desc); 432 u32 size = sizeof(gm20b_slcg_priring) / sizeof(struct gating_desc);
214 for (i = 0; i < size; i++) { 433 for (i = 0; i < size; i++) {
215 if (prod) 434 if (prod)
216 gk20a_writel(g, gm20b_blcg_gr[i].addr, 435 gk20a_writel(g, gm20b_slcg_priring[i].addr,
217 gm20b_blcg_gr[i].prod); 436 gm20b_slcg_priring[i].prod);
218 else 437 else
219 gk20a_writel(g, gm20b_blcg_gr[i].addr, 438 gk20a_writel(g, gm20b_slcg_priring[i].addr,
220 gm20b_blcg_gr[i].disable); 439 gm20b_slcg_priring[i].disable);
221 } 440 }
222} 441}
223 442
224void gr_gm20b_pg_gr_load_gating_prod(struct gk20a *g, 443void gm20b_slcg_pwr_csb_load_gating_prod(struct gk20a *g,
225 bool prod) 444 bool prod)
226{ 445{
227 u32 i; 446 u32 i;
228 u32 size = sizeof(gm20b_pg_gr) / sizeof(struct gating_desc); 447 u32 size = sizeof(gm20b_slcg_pwr_csb) / sizeof(struct gating_desc);
229 for (i = 0; i < size; i++) { 448 for (i = 0; i < size; i++) {
230 if (prod) 449 if (prod)
231 gk20a_writel(g, gm20b_pg_gr[i].addr, 450 gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr,
232 gm20b_pg_gr[i].prod); 451 gm20b_slcg_pwr_csb[i].prod);
233 else 452 else
234 gk20a_writel(g, gm20b_pg_gr[i].addr, 453 gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr,
235 gm20b_pg_gr[i].disable); 454 gm20b_slcg_pwr_csb[i].disable);
236 } 455 }
237} 456}
238 457
239void gr_gm20b_slcg_therm_load_gating_prod(struct gk20a *g, 458void gm20b_slcg_pmu_load_gating_prod(struct gk20a *g,
459 bool prod)
460{
461 u32 i;
462 u32 size = sizeof(gm20b_slcg_pmu) / sizeof(struct gating_desc);
463 for (i = 0; i < size; i++) {
464 if (prod)
465 gk20a_writel(g, gm20b_slcg_pmu[i].addr,
466 gm20b_slcg_pmu[i].prod);
467 else
468 gk20a_writel(g, gm20b_slcg_pmu[i].addr,
469 gm20b_slcg_pmu[i].disable);
470 }
471}
472
473void gm20b_slcg_therm_load_gating_prod(struct gk20a *g,
240 bool prod) 474 bool prod)
241{ 475{
242 u32 i; 476 u32 i;
@@ -251,4 +485,169 @@ void gr_gm20b_slcg_therm_load_gating_prod(struct gk20a *g,
251 } 485 }
252} 486}
253 487
488void gm20b_slcg_xbar_load_gating_prod(struct gk20a *g,
489 bool prod)
490{
491 u32 i;
492 u32 size = sizeof(gm20b_slcg_xbar) / sizeof(struct gating_desc);
493 for (i = 0; i < size; i++) {
494 if (prod)
495 gk20a_writel(g, gm20b_slcg_xbar[i].addr,
496 gm20b_slcg_xbar[i].prod);
497 else
498 gk20a_writel(g, gm20b_slcg_xbar[i].addr,
499 gm20b_slcg_xbar[i].disable);
500 }
501}
502
503void gm20b_blcg_bus_load_gating_prod(struct gk20a *g,
504 bool prod)
505{
506 u32 i;
507 u32 size = sizeof(gm20b_blcg_bus) / sizeof(struct gating_desc);
508 for (i = 0; i < size; i++) {
509 if (prod)
510 gk20a_writel(g, gm20b_blcg_bus[i].addr,
511 gm20b_blcg_bus[i].prod);
512 else
513 gk20a_writel(g, gm20b_blcg_bus[i].addr,
514 gm20b_blcg_bus[i].disable);
515 }
516}
517
518void gm20b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
519 bool prod)
520{
521 u32 i;
522 u32 size = sizeof(gm20b_blcg_ctxsw_firmware) / sizeof(struct gating_desc);
523 for (i = 0; i < size; i++) {
524 if (prod)
525 gk20a_writel(g, gm20b_blcg_ctxsw_firmware[i].addr,
526 gm20b_blcg_ctxsw_firmware[i].prod);
527 else
528 gk20a_writel(g, gm20b_blcg_ctxsw_firmware[i].addr,
529 gm20b_blcg_ctxsw_firmware[i].disable);
530 }
531}
532
533void gm20b_blcg_fb_load_gating_prod(struct gk20a *g,
534 bool prod)
535{
536 u32 i;
537 u32 size = sizeof(gm20b_blcg_fb) / sizeof(struct gating_desc);
538 for (i = 0; i < size; i++) {
539 if (prod)
540 gk20a_writel(g, gm20b_blcg_fb[i].addr,
541 gm20b_blcg_fb[i].prod);
542 else
543 gk20a_writel(g, gm20b_blcg_fb[i].addr,
544 gm20b_blcg_fb[i].disable);
545 }
546}
547
548void gm20b_blcg_fifo_load_gating_prod(struct gk20a *g,
549 bool prod)
550{
551 u32 i;
552 u32 size = sizeof(gm20b_blcg_fifo) / sizeof(struct gating_desc);
553 for (i = 0; i < size; i++) {
554 if (prod)
555 gk20a_writel(g, gm20b_blcg_fifo[i].addr,
556 gm20b_blcg_fifo[i].prod);
557 else
558 gk20a_writel(g, gm20b_blcg_fifo[i].addr,
559 gm20b_blcg_fifo[i].disable);
560 }
561}
562
563void gm20b_blcg_gr_load_gating_prod(struct gk20a *g,
564 bool prod)
565{
566 u32 i;
567 u32 size = sizeof(gm20b_blcg_gr) / sizeof(struct gating_desc);
568 for (i = 0; i < size; i++) {
569 if (prod)
570 gk20a_writel(g, gm20b_blcg_gr[i].addr,
571 gm20b_blcg_gr[i].prod);
572 else
573 gk20a_writel(g, gm20b_blcg_gr[i].addr,
574 gm20b_blcg_gr[i].disable);
575 }
576}
577
578void gm20b_blcg_ltc_load_gating_prod(struct gk20a *g,
579 bool prod)
580{
581 u32 i;
582 u32 size = sizeof(gm20b_blcg_ltc) / sizeof(struct gating_desc);
583 for (i = 0; i < size; i++) {
584 if (prod)
585 gk20a_writel(g, gm20b_blcg_ltc[i].addr,
586 gm20b_blcg_ltc[i].prod);
587 else
588 gk20a_writel(g, gm20b_blcg_ltc[i].addr,
589 gm20b_blcg_ltc[i].disable);
590 }
591}
592
593void gm20b_blcg_pwr_csb_load_gating_prod(struct gk20a *g,
594 bool prod)
595{
596 u32 i;
597 u32 size = sizeof(gm20b_blcg_pwr_csb) / sizeof(struct gating_desc);
598 for (i = 0; i < size; i++) {
599 if (prod)
600 gk20a_writel(g, gm20b_blcg_pwr_csb[i].addr,
601 gm20b_blcg_pwr_csb[i].prod);
602 else
603 gk20a_writel(g, gm20b_blcg_pwr_csb[i].addr,
604 gm20b_blcg_pwr_csb[i].disable);
605 }
606}
607
608void gm20b_blcg_pmu_load_gating_prod(struct gk20a *g,
609 bool prod)
610{
611 u32 i;
612 u32 size = sizeof(gm20b_blcg_pmu) / sizeof(struct gating_desc);
613 for (i = 0; i < size; i++) {
614 if (prod)
615 gk20a_writel(g, gm20b_blcg_pmu[i].addr,
616 gm20b_blcg_pmu[i].prod);
617 else
618 gk20a_writel(g, gm20b_blcg_pmu[i].addr,
619 gm20b_blcg_pmu[i].disable);
620 }
621}
622
623void gm20b_blcg_xbar_load_gating_prod(struct gk20a *g,
624 bool prod)
625{
626 u32 i;
627 u32 size = sizeof(gm20b_blcg_xbar) / sizeof(struct gating_desc);
628 for (i = 0; i < size; i++) {
629 if (prod)
630 gk20a_writel(g, gm20b_blcg_xbar[i].addr,
631 gm20b_blcg_xbar[i].prod);
632 else
633 gk20a_writel(g, gm20b_blcg_xbar[i].addr,
634 gm20b_blcg_xbar[i].disable);
635 }
636}
637
638void gr_gm20b_pg_gr_load_gating_prod(struct gk20a *g,
639 bool prod)
640{
641 u32 i;
642 u32 size = sizeof(gm20b_pg_gr) / sizeof(struct gating_desc);
643 for (i = 0; i < size; i++) {
644 if (prod)
645 gk20a_writel(g, gm20b_pg_gr[i].addr,
646 gm20b_pg_gr[i].prod);
647 else
648 gk20a_writel(g, gm20b_pg_gr[i].addr,
649 gm20b_pg_gr[i].disable);
650 }
651}
652
254#endif /* __gm20b_gating_reglist_h__ */ 653#endif /* __gm20b_gating_reglist_h__ */