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path: root/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index c593dd7c..b6afa748 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -11,7 +11,6 @@
11 * more details. 11 * more details.
12 */ 12 */
13 13
14#include <linux/firmware.h>
15#include <linux/debugfs.h> 14#include <linux/debugfs.h>
16 15
17#include <linux/platform/tegra/mc.h> 16#include <linux/platform/tegra/mc.h>
@@ -21,6 +20,7 @@
21#include <nvgpu/nvgpu_common.h> 20#include <nvgpu/nvgpu_common.h>
22#include <nvgpu/kmem.h> 21#include <nvgpu/kmem.h>
23#include <nvgpu/acr/nvgpu_acr.h> 22#include <nvgpu/acr/nvgpu_acr.h>
23#include <nvgpu/firmware.h>
24 24
25#include "gk20a/gk20a.h" 25#include "gk20a/gk20a.h"
26#include "gk20a/pmu_gk20a.h" 26#include "gk20a/pmu_gk20a.h"
@@ -123,7 +123,7 @@ void gm20b_init_secure_pmu(struct gpu_ops *gops)
123 123
124static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) 124static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img)
125{ 125{
126 const struct firmware *pmu_fw, *pmu_desc, *pmu_sig; 126 struct nvgpu_firmware *pmu_fw, *pmu_desc, *pmu_sig;
127 struct pmu_gk20a *pmu = &g->pmu; 127 struct pmu_gk20a *pmu = &g->pmu;
128 struct lsf_ucode_desc *lsf_desc; 128 struct lsf_ucode_desc *lsf_desc;
129 int err; 129 int err;
@@ -174,21 +174,21 @@ static int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img)
174 p_img->header = NULL; 174 p_img->header = NULL;
175 p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; 175 p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc;
176 gm20b_dbg_pmu("requesting PMU ucode in GM20B exit\n"); 176 gm20b_dbg_pmu("requesting PMU ucode in GM20B exit\n");
177 release_firmware(pmu_sig); 177 nvgpu_release_firmware(g, pmu_sig);
178 return 0; 178 return 0;
179release_sig: 179release_sig:
180 release_firmware(pmu_sig); 180 nvgpu_release_firmware(g, pmu_sig);
181release_desc: 181release_desc:
182 release_firmware(pmu_desc); 182 nvgpu_release_firmware(g, pmu_desc);
183release_img_fw: 183release_img_fw:
184 release_firmware(pmu_fw); 184 nvgpu_release_firmware(g, pmu_fw);
185 return err; 185 return err;
186} 186}
187 187
188static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) 188static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img)
189{ 189{
190 struct lsf_ucode_desc *lsf_desc; 190 struct lsf_ucode_desc *lsf_desc;
191 const struct firmware *fecs_sig; 191 struct nvgpu_firmware *fecs_sig;
192 int err; 192 int err;
193 193
194 fecs_sig = nvgpu_request_firmware(g, GM20B_FECS_UCODE_SIG, 0); 194 fecs_sig = nvgpu_request_firmware(g, GM20B_FECS_UCODE_SIG, 0);
@@ -244,18 +244,18 @@ static int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img)
244 p_img->header = NULL; 244 p_img->header = NULL;
245 p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; 245 p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc;
246 gm20b_dbg_pmu("fecs fw loaded\n"); 246 gm20b_dbg_pmu("fecs fw loaded\n");
247 release_firmware(fecs_sig); 247 nvgpu_release_firmware(g, fecs_sig);
248 return 0; 248 return 0;
249free_lsf_desc: 249free_lsf_desc:
250 nvgpu_kfree(g, lsf_desc); 250 nvgpu_kfree(g, lsf_desc);
251rel_sig: 251rel_sig:
252 release_firmware(fecs_sig); 252 nvgpu_release_firmware(g, fecs_sig);
253 return err; 253 return err;
254} 254}
255static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) 255static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img)
256{ 256{
257 struct lsf_ucode_desc *lsf_desc; 257 struct lsf_ucode_desc *lsf_desc;
258 const struct firmware *gpccs_sig; 258 struct nvgpu_firmware *gpccs_sig;
259 int err; 259 int err;
260 260
261 if (g->ops.securegpccs == false) 261 if (g->ops.securegpccs == false)
@@ -315,12 +315,12 @@ static int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img)
315 p_img->header = NULL; 315 p_img->header = NULL;
316 p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; 316 p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc;
317 gm20b_dbg_pmu("gpccs fw loaded\n"); 317 gm20b_dbg_pmu("gpccs fw loaded\n");
318 release_firmware(gpccs_sig); 318 nvgpu_release_firmware(g, gpccs_sig);
319 return 0; 319 return 0;
320free_lsf_desc: 320free_lsf_desc:
321 nvgpu_kfree(g, lsf_desc); 321 nvgpu_kfree(g, lsf_desc);
322rel_sig: 322rel_sig:
323 release_firmware(gpccs_sig); 323 nvgpu_release_firmware(g, gpccs_sig);
324 return err; 324 return err;
325} 325}
326 326
@@ -1070,7 +1070,7 @@ static int gm20b_bootstrap_hs_flcn(struct gk20a *g)
1070 u32 status, size; 1070 u32 status, size;
1071 u64 start; 1071 u64 start;
1072 struct acr_desc *acr = &g->acr; 1072 struct acr_desc *acr = &g->acr;
1073 const struct firmware *acr_fw = acr->acr_fw; 1073 struct nvgpu_firmware *acr_fw = acr->acr_fw;
1074 struct flcn_bl_dmem_desc *bl_dmem_desc = &acr->bl_dmem_desc; 1074 struct flcn_bl_dmem_desc *bl_dmem_desc = &acr->bl_dmem_desc;
1075 u32 *acr_ucode_header_t210_load; 1075 u32 *acr_ucode_header_t210_load;
1076 u32 *acr_ucode_data_t210_load; 1076 u32 *acr_ucode_data_t210_load;
@@ -1169,7 +1169,7 @@ static int gm20b_bootstrap_hs_flcn(struct gk20a *g)
1169err_free_ucode_map: 1169err_free_ucode_map:
1170 nvgpu_dma_unmap_free(vm, &acr->acr_ucode); 1170 nvgpu_dma_unmap_free(vm, &acr->acr_ucode);
1171err_release_acr_fw: 1171err_release_acr_fw:
1172 release_firmware(acr_fw); 1172 nvgpu_release_firmware(g, acr_fw);
1173 acr->acr_fw = NULL; 1173 acr->acr_fw = NULL;
1174 return err; 1174 return err;
1175} 1175}
@@ -1385,7 +1385,7 @@ int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt)
1385 int err = 0; 1385 int err = 0;
1386 u32 bl_sz; 1386 u32 bl_sz;
1387 struct acr_desc *acr = &g->acr; 1387 struct acr_desc *acr = &g->acr;
1388 const struct firmware *hsbl_fw = acr->hsbl_fw; 1388 struct nvgpu_firmware *hsbl_fw = acr->hsbl_fw;
1389 struct hsflcn_bl_desc *pmu_bl_gm10x_desc; 1389 struct hsflcn_bl_desc *pmu_bl_gm10x_desc;
1390 u32 *pmu_bl_gm10x = NULL; 1390 u32 *pmu_bl_gm10x = NULL;
1391 gm20b_dbg_pmu(""); 1391 gm20b_dbg_pmu("");
@@ -1472,7 +1472,7 @@ err_unmap_bl:
1472err_free_ucode: 1472err_free_ucode:
1473 nvgpu_dma_free(g, &acr->hsbl_ucode); 1473 nvgpu_dma_free(g, &acr->hsbl_ucode);
1474err_done: 1474err_done:
1475 release_firmware(hsbl_fw); 1475 nvgpu_release_firmware(g, hsbl_fw);
1476 return err; 1476 return err;
1477} 1477}
1478 1478