diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 45 |
1 files changed, 29 insertions, 16 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 09908df3..62d3a8fa 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -1233,20 +1233,8 @@ int gm20b_init_nspmu_setup_hw1(struct gk20a *g) | |||
1233 | return err; | 1233 | return err; |
1234 | } | 1234 | } |
1235 | 1235 | ||
1236 | int gm20b_init_pmu_setup_hw1(struct gk20a *g, | 1236 | void gm20b_setup_apertures(struct gk20a *g) |
1237 | void *desc, u32 bl_sz) | ||
1238 | { | 1237 | { |
1239 | |||
1240 | struct nvgpu_pmu *pmu = &g->pmu; | ||
1241 | int err; | ||
1242 | |||
1243 | gk20a_dbg_fn(""); | ||
1244 | |||
1245 | nvgpu_mutex_acquire(&pmu->isr_mutex); | ||
1246 | nvgpu_flcn_reset(pmu->flcn); | ||
1247 | pmu->isr_enabled = true; | ||
1248 | nvgpu_mutex_release(&pmu->isr_mutex); | ||
1249 | |||
1250 | /* setup apertures - virtual */ | 1238 | /* setup apertures - virtual */ |
1251 | gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE), | 1239 | gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_UCODE), |
1252 | pwr_fbif_transcfg_mem_type_physical_f() | | 1240 | pwr_fbif_transcfg_mem_type_physical_f() | |
@@ -1263,10 +1251,14 @@ int gm20b_init_pmu_setup_hw1(struct gk20a *g, | |||
1263 | gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_PHYS_SYS_NCOH), | 1251 | gk20a_writel(g, pwr_fbif_transcfg_r(GK20A_PMU_DMAIDX_PHYS_SYS_NCOH), |
1264 | pwr_fbif_transcfg_mem_type_physical_f() | | 1252 | pwr_fbif_transcfg_mem_type_physical_f() | |
1265 | pwr_fbif_transcfg_target_noncoherent_sysmem_f()); | 1253 | pwr_fbif_transcfg_target_noncoherent_sysmem_f()); |
1254 | } | ||
1266 | 1255 | ||
1256 | void gm20b_update_lspmu_cmdline_args(struct gk20a *g) | ||
1257 | { | ||
1258 | struct nvgpu_pmu *pmu = &g->pmu; | ||
1267 | /*Copying pmu cmdline args*/ | 1259 | /*Copying pmu cmdline args*/ |
1268 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, | 1260 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, |
1269 | g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_PWRCLK)); | 1261 | g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_PWRCLK)); |
1270 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1); | 1262 | g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1); |
1271 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_size( | 1263 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_size( |
1272 | pmu, GK20A_PMU_TRACE_BUFSIZE); | 1264 | pmu, GK20A_PMU_TRACE_BUFSIZE); |
@@ -1274,8 +1266,29 @@ int gm20b_init_pmu_setup_hw1(struct gk20a *g, | |||
1274 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_idx( | 1266 | g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_idx( |
1275 | pmu, GK20A_PMU_DMAIDX_VIRT); | 1267 | pmu, GK20A_PMU_DMAIDX_VIRT); |
1276 | nvgpu_flcn_copy_to_dmem(pmu->flcn, g->acr.pmu_args, | 1268 | nvgpu_flcn_copy_to_dmem(pmu->flcn, g->acr.pmu_args, |
1277 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), | 1269 | (u8 *)(g->ops.pmu_ver.get_pmu_cmdline_args_ptr(pmu)), |
1278 | g->ops.pmu_ver.get_pmu_cmdline_args_size(pmu), 0); | 1270 | g->ops.pmu_ver.get_pmu_cmdline_args_size(pmu), 0); |
1271 | } | ||
1272 | |||
1273 | int gm20b_init_pmu_setup_hw1(struct gk20a *g, | ||
1274 | void *desc, u32 bl_sz) | ||
1275 | { | ||
1276 | |||
1277 | struct nvgpu_pmu *pmu = &g->pmu; | ||
1278 | int err; | ||
1279 | |||
1280 | gk20a_dbg_fn(""); | ||
1281 | |||
1282 | nvgpu_mutex_acquire(&pmu->isr_mutex); | ||
1283 | nvgpu_flcn_reset(pmu->flcn); | ||
1284 | pmu->isr_enabled = true; | ||
1285 | nvgpu_mutex_release(&pmu->isr_mutex); | ||
1286 | |||
1287 | if (g->ops.pmu.setup_apertures) | ||
1288 | g->ops.pmu.setup_apertures(g); | ||
1289 | if (g->ops.pmu.update_lspmu_cmdline_args) | ||
1290 | g->ops.pmu.update_lspmu_cmdline_args(g); | ||
1291 | |||
1279 | /*disable irqs for hs falcon booting as we will poll for halt*/ | 1292 | /*disable irqs for hs falcon booting as we will poll for halt*/ |
1280 | nvgpu_mutex_acquire(&pmu->isr_mutex); | 1293 | nvgpu_mutex_acquire(&pmu->isr_mutex); |
1281 | pmu_enable_irq(pmu, false); | 1294 | pmu_enable_irq(pmu, false); |