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path: root/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index a39cdf2c..e5fd8692 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -1407,12 +1407,12 @@ int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout_ms)
1407{ 1407{
1408 struct nvgpu_pmu *pmu = &g->pmu; 1408 struct nvgpu_pmu *pmu = &g->pmu;
1409 u32 data = 0; 1409 u32 data = 0;
1410 int ret = -EBUSY; 1410 int ret = 0;
1411 1411
1412 ret = nvgpu_flcn_wait_for_halt(pmu->flcn, timeout_ms); 1412 ret = nvgpu_flcn_wait_for_halt(pmu->flcn, timeout_ms);
1413 if (ret) { 1413 if (ret) {
1414 nvgpu_err(g, "ACR boot timed out"); 1414 nvgpu_err(g, "ACR boot timed out");
1415 return ret; 1415 goto exit;
1416 } 1416 }
1417 1417
1418 g->acr.capabilities = gk20a_readl(g, pwr_falcon_mailbox1_r()); 1418 g->acr.capabilities = gk20a_readl(g, pwr_falcon_mailbox1_r());
@@ -1421,6 +1421,13 @@ int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout_ms)
1421 if (data) { 1421 if (data) {
1422 nvgpu_err(g, "ACR boot failed, err %x", data); 1422 nvgpu_err(g, "ACR boot failed, err %x", data);
1423 ret = -EAGAIN; 1423 ret = -EAGAIN;
1424 goto exit;
1425 }
1426
1427exit:
1428 if (ret) {
1429 nvgpu_kill_task_pg_init(g);
1430 nvgpu_pmu_state_change(g, PMU_STATE_OFF, false);
1424 } 1431 }
1425 1432
1426 return ret; 1433 return ret;