diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm206')
-rw-r--r-- | drivers/gpu/nvgpu/gm206/bios_gm206.c | 51 |
1 files changed, 35 insertions, 16 deletions
diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.c b/drivers/gpu/nvgpu/gm206/bios_gm206.c index 3993691a..b7260218 100644 --- a/drivers/gpu/nvgpu/gm206/bios_gm206.c +++ b/drivers/gpu/nvgpu/gm206/bios_gm206.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <nvgpu/bios.h> | 19 | #include <nvgpu/bios.h> |
20 | #include <nvgpu/kmem.h> | 20 | #include <nvgpu/kmem.h> |
21 | #include <nvgpu/nvgpu_common.h> | 21 | #include <nvgpu/nvgpu_common.h> |
22 | #include <nvgpu/timers.h> | ||
22 | 23 | ||
23 | #include "gk20a/gk20a.h" | 24 | #include "gk20a/gk20a.h" |
24 | #include "gm20b/fifo_gm20b.h" | 25 | #include "gm20b/fifo_gm20b.h" |
@@ -99,13 +100,15 @@ static void upload_data(struct gk20a *g, u32 dst, u8 *src, u32 size, u8 port) | |||
99 | 100 | ||
100 | static int gm206_bios_devinit(struct gk20a *g) | 101 | static int gm206_bios_devinit(struct gk20a *g) |
101 | { | 102 | { |
102 | int retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT; | ||
103 | int err = 0; | 103 | int err = 0; |
104 | int devinit_completed; | 104 | int devinit_completed; |
105 | struct nvgpu_timeout timeout; | ||
105 | 106 | ||
106 | gk20a_dbg_fn(""); | 107 | gk20a_dbg_fn(""); |
107 | g->ops.pmu.reset(g); | 108 | g->ops.pmu.reset(g); |
108 | 109 | ||
110 | nvgpu_timeout_init(g, &timeout, PMU_BOOT_TIMEOUT_MAX / 1000, | ||
111 | NVGPU_TIMER_CPU_TIMER); | ||
109 | do { | 112 | do { |
110 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & | 113 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & |
111 | (pwr_falcon_dmactl_dmem_scrubbing_m() | | 114 | (pwr_falcon_dmactl_dmem_scrubbing_m() | |
@@ -116,9 +119,13 @@ static int gm206_bios_devinit(struct gk20a *g) | |||
116 | break; | 119 | break; |
117 | } | 120 | } |
118 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); | 121 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); |
119 | } while (--retries || !tegra_platform_is_silicon()); | 122 | } while (!nvgpu_timeout_expired(&timeout)); |
123 | |||
124 | if (nvgpu_timeout_peek_expired(&timeout)) { | ||
125 | err = -ETIMEDOUT; | ||
126 | goto out; | ||
127 | } | ||
120 | 128 | ||
121 | /* todo check retries */ | ||
122 | upload_code(g, g->bios.devinit.bootloader_phys_base, | 129 | upload_code(g, g->bios.devinit.bootloader_phys_base, |
123 | g->bios.devinit.bootloader, | 130 | g->bios.devinit.bootloader, |
124 | g->bios.devinit.bootloader_size, | 131 | g->bios.devinit.bootloader_size, |
@@ -147,35 +154,39 @@ static int gm206_bios_devinit(struct gk20a *g) | |||
147 | gk20a_writel(g, pwr_falcon_cpuctl_r(), | 154 | gk20a_writel(g, pwr_falcon_cpuctl_r(), |
148 | pwr_falcon_cpuctl_startcpu_f(1)); | 155 | pwr_falcon_cpuctl_startcpu_f(1)); |
149 | 156 | ||
150 | retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT; | 157 | nvgpu_timeout_init(g, &timeout, PMU_BOOT_TIMEOUT_MAX / 1000, |
158 | NVGPU_TIMER_CPU_TIMER); | ||
151 | do { | 159 | do { |
152 | devinit_completed = pwr_falcon_cpuctl_halt_intr_v( | 160 | devinit_completed = pwr_falcon_cpuctl_halt_intr_v( |
153 | gk20a_readl(g, pwr_falcon_cpuctl_r())) && | 161 | gk20a_readl(g, pwr_falcon_cpuctl_r())) && |
154 | top_scratch1_devinit_completed_v( | 162 | top_scratch1_devinit_completed_v( |
155 | gk20a_readl(g, top_scratch1_r())); | 163 | gk20a_readl(g, top_scratch1_r())); |
156 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); | 164 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); |
157 | } while (!devinit_completed && retries--); | 165 | } while (!devinit_completed && !nvgpu_timeout_expired(&timeout)); |
166 | |||
167 | if (nvgpu_timeout_peek_expired(&timeout)) | ||
168 | err = -ETIMEDOUT; | ||
158 | 169 | ||
159 | gk20a_writel(g, pwr_falcon_irqsclr_r(), | 170 | gk20a_writel(g, pwr_falcon_irqsclr_r(), |
160 | pwr_falcon_irqstat_halt_true_f()); | 171 | pwr_falcon_irqstat_halt_true_f()); |
161 | gk20a_readl(g, pwr_falcon_irqsclr_r()); | 172 | gk20a_readl(g, pwr_falcon_irqsclr_r()); |
162 | 173 | ||
163 | if (!retries) | 174 | out: |
164 | err = -EINVAL; | ||
165 | |||
166 | gk20a_dbg_fn("done"); | 175 | gk20a_dbg_fn("done"); |
167 | return err; | 176 | return err; |
168 | } | 177 | } |
169 | 178 | ||
170 | static int gm206_bios_preos(struct gk20a *g) | 179 | static int gm206_bios_preos(struct gk20a *g) |
171 | { | 180 | { |
172 | int retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT; | ||
173 | int err = 0; | 181 | int err = 0; |
174 | int val; | 182 | int val; |
183 | struct nvgpu_timeout timeout; | ||
175 | 184 | ||
176 | gk20a_dbg_fn(""); | 185 | gk20a_dbg_fn(""); |
177 | g->ops.pmu.reset(g); | 186 | g->ops.pmu.reset(g); |
178 | 187 | ||
188 | nvgpu_timeout_init(g, &timeout, PMU_BOOT_TIMEOUT_MAX / 1000, | ||
189 | NVGPU_TIMER_CPU_TIMER); | ||
179 | do { | 190 | do { |
180 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & | 191 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & |
181 | (pwr_falcon_dmactl_dmem_scrubbing_m() | | 192 | (pwr_falcon_dmactl_dmem_scrubbing_m() | |
@@ -186,9 +197,13 @@ static int gm206_bios_preos(struct gk20a *g) | |||
186 | break; | 197 | break; |
187 | } | 198 | } |
188 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); | 199 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); |
189 | } while (--retries || !tegra_platform_is_silicon()); | 200 | } while (!nvgpu_timeout_expired(&timeout)); |
201 | |||
202 | if (nvgpu_timeout_peek_expired(&timeout)) { | ||
203 | err = -ETIMEDOUT; | ||
204 | goto out; | ||
205 | } | ||
190 | 206 | ||
191 | /* todo check retries */ | ||
192 | upload_code(g, g->bios.preos.bootloader_phys_base, | 207 | upload_code(g, g->bios.preos.bootloader_phys_base, |
193 | g->bios.preos.bootloader, | 208 | g->bios.preos.bootloader, |
194 | g->bios.preos.bootloader_size, | 209 | g->bios.preos.bootloader_size, |
@@ -209,20 +224,24 @@ static int gm206_bios_preos(struct gk20a *g) | |||
209 | gk20a_writel(g, pwr_falcon_cpuctl_r(), | 224 | gk20a_writel(g, pwr_falcon_cpuctl_r(), |
210 | pwr_falcon_cpuctl_startcpu_f(1)); | 225 | pwr_falcon_cpuctl_startcpu_f(1)); |
211 | 226 | ||
212 | retries = PMU_BOOT_TIMEOUT_MAX / PMU_BOOT_TIMEOUT_DEFAULT; | 227 | nvgpu_timeout_init(g, &timeout, PMU_BOOT_TIMEOUT_MAX / 1000, |
228 | NVGPU_TIMER_CPU_TIMER); | ||
213 | do { | 229 | do { |
214 | val = pwr_falcon_cpuctl_halt_intr_v( | 230 | val = pwr_falcon_cpuctl_halt_intr_v( |
215 | gk20a_readl(g, pwr_falcon_cpuctl_r())); | 231 | gk20a_readl(g, pwr_falcon_cpuctl_r())); |
216 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); | 232 | udelay(PMU_BOOT_TIMEOUT_DEFAULT); |
217 | } while (!val && retries--); | 233 | } while (!val && !nvgpu_timeout_expired(&timeout)); |
234 | |||
235 | if (nvgpu_timeout_peek_expired(&timeout)) { | ||
236 | err = -ETIMEDOUT; | ||
237 | goto out; | ||
238 | } | ||
218 | 239 | ||
219 | gk20a_writel(g, pwr_falcon_irqsclr_r(), | 240 | gk20a_writel(g, pwr_falcon_irqsclr_r(), |
220 | pwr_falcon_irqstat_halt_true_f()); | 241 | pwr_falcon_irqstat_halt_true_f()); |
221 | gk20a_readl(g, pwr_falcon_irqsclr_r()); | 242 | gk20a_readl(g, pwr_falcon_irqsclr_r()); |
222 | 243 | ||
223 | if (!retries) | 244 | out: |
224 | err = -EINVAL; | ||
225 | |||
226 | gk20a_dbg_fn("done"); | 245 | gk20a_dbg_fn("done"); |
227 | return err; | 246 | return err; |
228 | } | 247 | } |