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-rw-r--r--drivers/gpu/nvgpu/gm206/hw_ram_gm206.h445
1 files changed, 0 insertions, 445 deletions
diff --git a/drivers/gpu/nvgpu/gm206/hw_ram_gm206.h b/drivers/gpu/nvgpu/gm206/hw_ram_gm206.h
deleted file mode 100644
index 8007d8c2..00000000
--- a/drivers/gpu/nvgpu/gm206/hw_ram_gm206.h
+++ /dev/null
@@ -1,445 +0,0 @@
1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16/*
17 * Function naming determines intended use:
18 *
19 * <x>_r(void) : Returns the offset for register <x>.
20 *
21 * <x>_o(void) : Returns the offset for element <x>.
22 *
23 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
24 *
25 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
26 *
27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
28 * and masked to place it at field <y> of register <x>. This value
29 * can be |'d with others to produce a full register value for
30 * register <x>.
31 *
32 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
33 * value can be ~'d and then &'d to clear the value of field <y> for
34 * register <x>.
35 *
36 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
37 * to place it at field <y> of register <x>. This value can be |'d
38 * with others to produce a full register value for <x>.
39 *
40 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
42 * This value is suitable for direct comparison with other unshifted
43 * values appropriate for use in field <y> of register <x>.
44 *
45 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
46 * field <y> of register <x>. This value is suitable for direct
47 * comparison with unshifted values appropriate for use in field <y>
48 * of register <x>.
49 */
50#ifndef _hw_ram_gm206_h_
51#define _hw_ram_gm206_h_
52
53static inline u32 ram_in_ramfc_s(void)
54{
55 return 4096;
56}
57static inline u32 ram_in_ramfc_w(void)
58{
59 return 0;
60}
61static inline u32 ram_in_page_dir_base_target_f(u32 v)
62{
63 return (v & 0x3) << 0;
64}
65static inline u32 ram_in_page_dir_base_target_w(void)
66{
67 return 128;
68}
69static inline u32 ram_in_page_dir_base_target_vid_mem_f(void)
70{
71 return 0x0;
72}
73static inline u32 ram_in_page_dir_base_target_sys_mem_coh_f(void)
74{
75 return 0x2;
76}
77static inline u32 ram_in_page_dir_base_target_sys_mem_ncoh_f(void)
78{
79 return 0x3;
80}
81static inline u32 ram_in_page_dir_base_vol_w(void)
82{
83 return 128;
84}
85static inline u32 ram_in_page_dir_base_vol_true_f(void)
86{
87 return 0x4;
88}
89static inline u32 ram_in_big_page_size_f(u32 v)
90{
91 return (v & 0x1) << 11;
92}
93static inline u32 ram_in_big_page_size_m(void)
94{
95 return 0x1 << 11;
96}
97static inline u32 ram_in_big_page_size_w(void)
98{
99 return 128;
100}
101static inline u32 ram_in_big_page_size_128kb_f(void)
102{
103 return 0x0;
104}
105static inline u32 ram_in_big_page_size_64kb_f(void)
106{
107 return 0x800;
108}
109static inline u32 ram_in_page_dir_base_lo_f(u32 v)
110{
111 return (v & 0xfffff) << 12;
112}
113static inline u32 ram_in_page_dir_base_lo_w(void)
114{
115 return 128;
116}
117static inline u32 ram_in_page_dir_base_hi_f(u32 v)
118{
119 return (v & 0xff) << 0;
120}
121static inline u32 ram_in_page_dir_base_hi_w(void)
122{
123 return 129;
124}
125static inline u32 ram_in_adr_limit_lo_f(u32 v)
126{
127 return (v & 0xfffff) << 12;
128}
129static inline u32 ram_in_adr_limit_lo_w(void)
130{
131 return 130;
132}
133static inline u32 ram_in_adr_limit_hi_f(u32 v)
134{
135 return (v & 0xff) << 0;
136}
137static inline u32 ram_in_adr_limit_hi_w(void)
138{
139 return 131;
140}
141static inline u32 ram_in_engine_cs_w(void)
142{
143 return 132;
144}
145static inline u32 ram_in_engine_cs_wfi_v(void)
146{
147 return 0x00000000;
148}
149static inline u32 ram_in_engine_cs_wfi_f(void)
150{
151 return 0x0;
152}
153static inline u32 ram_in_engine_cs_fg_v(void)
154{
155 return 0x00000001;
156}
157static inline u32 ram_in_engine_cs_fg_f(void)
158{
159 return 0x8;
160}
161static inline u32 ram_in_gr_cs_w(void)
162{
163 return 132;
164}
165static inline u32 ram_in_gr_cs_wfi_f(void)
166{
167 return 0x0;
168}
169static inline u32 ram_in_gr_wfi_target_w(void)
170{
171 return 132;
172}
173static inline u32 ram_in_gr_wfi_mode_w(void)
174{
175 return 132;
176}
177static inline u32 ram_in_gr_wfi_mode_physical_v(void)
178{
179 return 0x00000000;
180}
181static inline u32 ram_in_gr_wfi_mode_physical_f(void)
182{
183 return 0x0;
184}
185static inline u32 ram_in_gr_wfi_mode_virtual_v(void)
186{
187 return 0x00000001;
188}
189static inline u32 ram_in_gr_wfi_mode_virtual_f(void)
190{
191 return 0x4;
192}
193static inline u32 ram_in_gr_wfi_ptr_lo_f(u32 v)
194{
195 return (v & 0xfffff) << 12;
196}
197static inline u32 ram_in_gr_wfi_ptr_lo_w(void)
198{
199 return 132;
200}
201static inline u32 ram_in_gr_wfi_ptr_hi_f(u32 v)
202{
203 return (v & 0xff) << 0;
204}
205static inline u32 ram_in_gr_wfi_ptr_hi_w(void)
206{
207 return 133;
208}
209static inline u32 ram_in_base_shift_v(void)
210{
211 return 0x0000000c;
212}
213static inline u32 ram_in_alloc_size_v(void)
214{
215 return 0x00001000;
216}
217static inline u32 ram_fc_size_val_v(void)
218{
219 return 0x00000200;
220}
221static inline u32 ram_fc_gp_put_w(void)
222{
223 return 0;
224}
225static inline u32 ram_fc_userd_w(void)
226{
227 return 2;
228}
229static inline u32 ram_fc_userd_hi_w(void)
230{
231 return 3;
232}
233static inline u32 ram_fc_signature_w(void)
234{
235 return 4;
236}
237static inline u32 ram_fc_gp_get_w(void)
238{
239 return 5;
240}
241static inline u32 ram_fc_pb_get_w(void)
242{
243 return 6;
244}
245static inline u32 ram_fc_pb_get_hi_w(void)
246{
247 return 7;
248}
249static inline u32 ram_fc_pb_top_level_get_w(void)
250{
251 return 8;
252}
253static inline u32 ram_fc_pb_top_level_get_hi_w(void)
254{
255 return 9;
256}
257static inline u32 ram_fc_acquire_w(void)
258{
259 return 12;
260}
261static inline u32 ram_fc_semaphorea_w(void)
262{
263 return 14;
264}
265static inline u32 ram_fc_semaphoreb_w(void)
266{
267 return 15;
268}
269static inline u32 ram_fc_semaphorec_w(void)
270{
271 return 16;
272}
273static inline u32 ram_fc_semaphored_w(void)
274{
275 return 17;
276}
277static inline u32 ram_fc_gp_base_w(void)
278{
279 return 18;
280}
281static inline u32 ram_fc_gp_base_hi_w(void)
282{
283 return 19;
284}
285static inline u32 ram_fc_gp_fetch_w(void)
286{
287 return 20;
288}
289static inline u32 ram_fc_pb_fetch_w(void)
290{
291 return 21;
292}
293static inline u32 ram_fc_pb_fetch_hi_w(void)
294{
295 return 22;
296}
297static inline u32 ram_fc_pb_put_w(void)
298{
299 return 23;
300}
301static inline u32 ram_fc_pb_put_hi_w(void)
302{
303 return 24;
304}
305static inline u32 ram_fc_pb_header_w(void)
306{
307 return 33;
308}
309static inline u32 ram_fc_pb_count_w(void)
310{
311 return 34;
312}
313static inline u32 ram_fc_subdevice_w(void)
314{
315 return 37;
316}
317static inline u32 ram_fc_formats_w(void)
318{
319 return 39;
320}
321static inline u32 ram_fc_target_w(void)
322{
323 return 43;
324}
325static inline u32 ram_fc_hce_ctrl_w(void)
326{
327 return 57;
328}
329static inline u32 ram_fc_chid_w(void)
330{
331 return 58;
332}
333static inline u32 ram_fc_chid_id_f(u32 v)
334{
335 return (v & 0xfff) << 0;
336}
337static inline u32 ram_fc_chid_id_w(void)
338{
339 return 0;
340}
341static inline u32 ram_fc_runlist_timeslice_w(void)
342{
343 return 62;
344}
345static inline u32 ram_userd_base_shift_v(void)
346{
347 return 0x00000009;
348}
349static inline u32 ram_userd_chan_size_v(void)
350{
351 return 0x00000200;
352}
353static inline u32 ram_userd_put_w(void)
354{
355 return 16;
356}
357static inline u32 ram_userd_get_w(void)
358{
359 return 17;
360}
361static inline u32 ram_userd_ref_w(void)
362{
363 return 18;
364}
365static inline u32 ram_userd_put_hi_w(void)
366{
367 return 19;
368}
369static inline u32 ram_userd_ref_threshold_w(void)
370{
371 return 20;
372}
373static inline u32 ram_userd_top_level_get_w(void)
374{
375 return 22;
376}
377static inline u32 ram_userd_top_level_get_hi_w(void)
378{
379 return 23;
380}
381static inline u32 ram_userd_get_hi_w(void)
382{
383 return 24;
384}
385static inline u32 ram_userd_gp_get_w(void)
386{
387 return 34;
388}
389static inline u32 ram_userd_gp_put_w(void)
390{
391 return 35;
392}
393static inline u32 ram_userd_gp_top_level_get_w(void)
394{
395 return 22;
396}
397static inline u32 ram_userd_gp_top_level_get_hi_w(void)
398{
399 return 23;
400}
401static inline u32 ram_rl_entry_size_v(void)
402{
403 return 0x00000008;
404}
405static inline u32 ram_rl_entry_chid_f(u32 v)
406{
407 return (v & 0xfff) << 0;
408}
409static inline u32 ram_rl_entry_id_f(u32 v)
410{
411 return (v & 0xfff) << 0;
412}
413static inline u32 ram_rl_entry_type_f(u32 v)
414{
415 return (v & 0x1) << 13;
416}
417static inline u32 ram_rl_entry_type_chid_f(void)
418{
419 return 0x0;
420}
421static inline u32 ram_rl_entry_type_tsg_f(void)
422{
423 return 0x2000;
424}
425static inline u32 ram_rl_entry_timeslice_scale_f(u32 v)
426{
427 return (v & 0xf) << 14;
428}
429static inline u32 ram_rl_entry_timeslice_scale_3_f(void)
430{
431 return 0xc000;
432}
433static inline u32 ram_rl_entry_timeslice_timeout_f(u32 v)
434{
435 return (v & 0xff) << 18;
436}
437static inline u32 ram_rl_entry_timeslice_timeout_128_f(void)
438{
439 return 0x2000000;
440}
441static inline u32 ram_rl_entry_tsg_length_f(u32 v)
442{
443 return (v & 0x3f) << 26;
444}
445#endif
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