diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gm206/hal_gm206.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm206/hal_gm206.c | 225 |
1 files changed, 0 insertions, 225 deletions
diff --git a/drivers/gpu/nvgpu/gm206/hal_gm206.c b/drivers/gpu/nvgpu/gm206/hal_gm206.c deleted file mode 100644 index e2b84d81..00000000 --- a/drivers/gpu/nvgpu/gm206/hal_gm206.c +++ /dev/null | |||
@@ -1,225 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | */ | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | #include <linux/printk.h> | ||
16 | #include <linux/types.h> | ||
17 | |||
18 | #include "ce_gm206.h" | ||
19 | #include "fifo_gm206.h" | ||
20 | #include "bios_gm206.h" | ||
21 | #include "gr_gm206.h" | ||
22 | |||
23 | #include "gk20a/gk20a.h" | ||
24 | #include "gk20a/dbg_gpu_gk20a.h" | ||
25 | #include "gk20a/css_gr_gk20a.h" | ||
26 | #include "gm20b/mc_gm20b.h" | ||
27 | #include "gm20b/ltc_gm20b.h" | ||
28 | #include "gm20b/mm_gm20b.h" | ||
29 | #include "gm20b/fb_gm20b.h" | ||
30 | #include "gm20b/pmu_gm20b.h" | ||
31 | #include "gm20b/gr_gm20b.h" | ||
32 | #include "gm20b/gr_ctx_gm20b.h" | ||
33 | #include "gm20b/gm20b_gating_reglist.h" | ||
34 | #include "gm20b/regops_gm20b.h" | ||
35 | #include "gm20b/cde_gm20b.h" | ||
36 | #include "gm20b/therm_gm20b.h" | ||
37 | #include "gm20b/clk_gm20b.h" | ||
38 | #include "gm20b/debug_gm20b.h" | ||
39 | #include "gm206/mm_gm206.h" | ||
40 | |||
41 | #include <nvgpu/hw/gm206/hw_proj_gm206.h> | ||
42 | |||
43 | static struct gpu_ops gm206_ops = { | ||
44 | .clock_gating = { | ||
45 | .slcg_bus_load_gating_prod = | ||
46 | gm20b_slcg_bus_load_gating_prod, | ||
47 | .slcg_ce2_load_gating_prod = | ||
48 | gm20b_slcg_ce2_load_gating_prod, | ||
49 | .slcg_chiplet_load_gating_prod = | ||
50 | gm20b_slcg_chiplet_load_gating_prod, | ||
51 | .slcg_ctxsw_firmware_load_gating_prod = | ||
52 | gm20b_slcg_ctxsw_firmware_load_gating_prod, | ||
53 | .slcg_fb_load_gating_prod = | ||
54 | gm20b_slcg_fb_load_gating_prod, | ||
55 | .slcg_fifo_load_gating_prod = | ||
56 | gm20b_slcg_fifo_load_gating_prod, | ||
57 | .slcg_gr_load_gating_prod = | ||
58 | gr_gm20b_slcg_gr_load_gating_prod, | ||
59 | .slcg_ltc_load_gating_prod = | ||
60 | ltc_gm20b_slcg_ltc_load_gating_prod, | ||
61 | .slcg_perf_load_gating_prod = | ||
62 | gm20b_slcg_perf_load_gating_prod, | ||
63 | .slcg_priring_load_gating_prod = | ||
64 | gm20b_slcg_priring_load_gating_prod, | ||
65 | .slcg_pmu_load_gating_prod = | ||
66 | gm20b_slcg_pmu_load_gating_prod, | ||
67 | .slcg_therm_load_gating_prod = | ||
68 | gm20b_slcg_therm_load_gating_prod, | ||
69 | .slcg_xbar_load_gating_prod = | ||
70 | gm20b_slcg_xbar_load_gating_prod, | ||
71 | .blcg_bus_load_gating_prod = | ||
72 | gm20b_blcg_bus_load_gating_prod, | ||
73 | .blcg_ctxsw_firmware_load_gating_prod = | ||
74 | gm20b_blcg_ctxsw_firmware_load_gating_prod, | ||
75 | .blcg_fb_load_gating_prod = | ||
76 | gm20b_blcg_fb_load_gating_prod, | ||
77 | .blcg_fifo_load_gating_prod = | ||
78 | gm20b_blcg_fifo_load_gating_prod, | ||
79 | .blcg_gr_load_gating_prod = | ||
80 | gm20b_blcg_gr_load_gating_prod, | ||
81 | .blcg_ltc_load_gating_prod = | ||
82 | gm20b_blcg_ltc_load_gating_prod, | ||
83 | .blcg_pwr_csb_load_gating_prod = | ||
84 | gm20b_blcg_pwr_csb_load_gating_prod, | ||
85 | .blcg_pmu_load_gating_prod = | ||
86 | gm20b_blcg_pmu_load_gating_prod, | ||
87 | .blcg_xbar_load_gating_prod = | ||
88 | gm20b_blcg_xbar_load_gating_prod, | ||
89 | .pg_gr_load_gating_prod = | ||
90 | gr_gm20b_pg_gr_load_gating_prod, | ||
91 | } | ||
92 | }; | ||
93 | |||
94 | static int gm206_get_litter_value(struct gk20a *g, int value) | ||
95 | { | ||
96 | int ret = -EINVAL; | ||
97 | |||
98 | switch (value) { | ||
99 | case GPU_LIT_NUM_GPCS: | ||
100 | ret = proj_scal_litter_num_gpcs_v(); | ||
101 | break; | ||
102 | case GPU_LIT_NUM_PES_PER_GPC: | ||
103 | ret = proj_scal_litter_num_pes_per_gpc_v(); | ||
104 | break; | ||
105 | case GPU_LIT_NUM_ZCULL_BANKS: | ||
106 | ret = proj_scal_litter_num_zcull_banks_v(); | ||
107 | break; | ||
108 | case GPU_LIT_NUM_TPC_PER_GPC: | ||
109 | ret = proj_scal_litter_num_tpc_per_gpc_v(); | ||
110 | break; | ||
111 | case GPU_LIT_NUM_FBPS: | ||
112 | ret = proj_scal_litter_num_fbps_v(); | ||
113 | break; | ||
114 | case GPU_LIT_GPC_BASE: | ||
115 | ret = proj_gpc_base_v(); | ||
116 | break; | ||
117 | case GPU_LIT_GPC_STRIDE: | ||
118 | ret = proj_gpc_stride_v(); | ||
119 | break; | ||
120 | case GPU_LIT_GPC_SHARED_BASE: | ||
121 | ret = proj_gpc_shared_base_v(); | ||
122 | break; | ||
123 | case GPU_LIT_TPC_IN_GPC_BASE: | ||
124 | ret = proj_tpc_in_gpc_base_v(); | ||
125 | break; | ||
126 | case GPU_LIT_TPC_IN_GPC_STRIDE: | ||
127 | ret = proj_tpc_in_gpc_stride_v(); | ||
128 | break; | ||
129 | case GPU_LIT_TPC_IN_GPC_SHARED_BASE: | ||
130 | ret = proj_tpc_in_gpc_shared_base_v(); | ||
131 | break; | ||
132 | case GPU_LIT_PPC_IN_GPC_STRIDE: | ||
133 | ret = proj_ppc_in_gpc_stride_v(); | ||
134 | break; | ||
135 | case GPU_LIT_ROP_BASE: | ||
136 | ret = proj_rop_base_v(); | ||
137 | break; | ||
138 | case GPU_LIT_ROP_STRIDE: | ||
139 | ret = proj_rop_stride_v(); | ||
140 | break; | ||
141 | case GPU_LIT_ROP_SHARED_BASE: | ||
142 | ret = proj_rop_shared_base_v(); | ||
143 | break; | ||
144 | case GPU_LIT_HOST_NUM_ENGINES: | ||
145 | ret = proj_host_num_engines_v(); | ||
146 | break; | ||
147 | case GPU_LIT_HOST_NUM_PBDMA: | ||
148 | ret = proj_host_num_pbdma_v(); | ||
149 | break; | ||
150 | case GPU_LIT_LTC_STRIDE: | ||
151 | ret = proj_ltc_stride_v(); | ||
152 | break; | ||
153 | case GPU_LIT_LTS_STRIDE: | ||
154 | ret = proj_lts_stride_v(); | ||
155 | break; | ||
156 | case GPU_LIT_NUM_FBPAS: | ||
157 | ret = proj_scal_litter_num_fbpas_v(); | ||
158 | break; | ||
159 | case GPU_LIT_FBPA_STRIDE: | ||
160 | ret = proj_fbpa_stride_v(); | ||
161 | break; | ||
162 | default: | ||
163 | BUG(); | ||
164 | break; | ||
165 | } | ||
166 | |||
167 | return ret; | ||
168 | } | ||
169 | |||
170 | int gm206_init_hal(struct gk20a *g) | ||
171 | { | ||
172 | struct gpu_ops *gops = &g->ops; | ||
173 | struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics; | ||
174 | u32 ver = g->gpu_characteristics.arch + g->gpu_characteristics.impl; | ||
175 | |||
176 | *gops = gm206_ops; | ||
177 | |||
178 | gops->privsecurity = 1; | ||
179 | gops->securegpccs = 1; | ||
180 | gops->pmupstate = false; | ||
181 | gm20b_init_mc(gops); | ||
182 | gm20b_init_ltc(gops); | ||
183 | gm206_init_gr(gops); | ||
184 | gm20b_init_ltc(gops); | ||
185 | gm20b_init_fb(gops); | ||
186 | g->ops.fb.set_use_full_comp_tag_line = NULL; | ||
187 | gm206_init_fifo(gops); | ||
188 | gm206_init_ce(gops); | ||
189 | gm20b_init_gr_ctx(gops); | ||
190 | gm206_init_mm(gops); | ||
191 | gm20b_init_clk_ops(gops); | ||
192 | gm20b_init_regops(gops); | ||
193 | gm20b_init_debug_ops(gops); | ||
194 | gk20a_init_dbg_session_ops(gops); | ||
195 | gm20b_init_cde_ops(gops); | ||
196 | gm20b_init_therm_ops(gops); | ||
197 | gk20a_init_tsg_ops(gops); | ||
198 | #if defined(CONFIG_GK20A_CYCLE_STATS) | ||
199 | gk20a_init_css_ops(gops); | ||
200 | #endif | ||
201 | gm206_init_bios_ops(gops); | ||
202 | switch(ver){ | ||
203 | case GK20A_GPUID_GM206: | ||
204 | gops->name = "gm206"; | ||
205 | break; | ||
206 | case GK20A_GPUID_GM204: | ||
207 | gops->name = "gm204"; | ||
208 | break; | ||
209 | default: | ||
210 | gk20a_err(g->dev, "no support for %x", ver); | ||
211 | BUG(); | ||
212 | } | ||
213 | gops->chip_init_gpu_characteristics = gk20a_init_gpu_characteristics; | ||
214 | gops->get_litter_value = gm206_get_litter_value; | ||
215 | gops->gr_ctx.use_dma_for_fw_bootstrap = true; | ||
216 | |||
217 | c->twod_class = FERMI_TWOD_A; | ||
218 | c->threed_class = MAXWELL_B; | ||
219 | c->compute_class = MAXWELL_COMPUTE_B; | ||
220 | c->gpfifo_class = MAXWELL_CHANNEL_GPFIFO_A; | ||
221 | c->inline_to_memory_class = KEPLER_INLINE_TO_MEMORY_B; | ||
222 | c->dma_copy_class = MAXWELL_DMA_COPY_A; | ||
223 | |||
224 | return 0; | ||
225 | } | ||