diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 22 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.h | 6 |
3 files changed, 22 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 49038a0f..0bbc66cf 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -139,6 +139,10 @@ struct gpu_ops { | |||
139 | bool (*is_tpc_addr)(u32 addr); | 139 | bool (*is_tpc_addr)(u32 addr); |
140 | u32 (*get_tpc_num)(u32 addr); | 140 | u32 (*get_tpc_num)(u32 addr); |
141 | void (*detect_sm_arch)(struct gk20a *g); | 141 | void (*detect_sm_arch)(struct gk20a *g); |
142 | int (*add_zbc_color)(struct gk20a *g, struct gr_gk20a *gr, | ||
143 | struct zbc_entry *color_val, u32 index); | ||
144 | int (*add_zbc_depth)(struct gk20a *g, struct gr_gk20a *gr, | ||
145 | struct zbc_entry *depth_val, u32 index); | ||
142 | } gr; | 146 | } gr; |
143 | const char *name; | 147 | const char *name; |
144 | struct { | 148 | struct { |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 3cf5845c..36636d4f 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -285,8 +285,8 @@ static void gr_gk20a_load_falcon_imem(struct gk20a *g) | |||
285 | } | 285 | } |
286 | } | 286 | } |
287 | 287 | ||
288 | static int gr_gk20a_wait_idle(struct gk20a *g, unsigned long end_jiffies, | 288 | int gr_gk20a_wait_idle(struct gk20a *g, unsigned long end_jiffies, |
289 | u32 expect_delay) | 289 | u32 expect_delay) |
290 | { | 290 | { |
291 | u32 delay = expect_delay; | 291 | u32 delay = expect_delay; |
292 | bool gr_enabled; | 292 | bool gr_enabled; |
@@ -3512,8 +3512,8 @@ static void gr_gk20a_detect_sm_arch(struct gk20a *g) | |||
3512 | gr_gpc0_tpc0_sm_arch_warp_count_v(v); | 3512 | gr_gpc0_tpc0_sm_arch_warp_count_v(v); |
3513 | } | 3513 | } |
3514 | 3514 | ||
3515 | static int gr_gk20a_add_zbc_color(struct gk20a *g, struct gr_gk20a *gr, | 3515 | int gr_gk20a_add_zbc_color(struct gk20a *g, struct gr_gk20a *gr, |
3516 | struct zbc_entry *color_val, u32 index) | 3516 | struct zbc_entry *color_val, u32 index) |
3517 | { | 3517 | { |
3518 | struct fifo_gk20a *f = &g->fifo; | 3518 | struct fifo_gk20a *f = &g->fifo; |
3519 | struct fifo_engine_info_gk20a *gr_info = f->engine_info + ENGINE_GR_GK20A; | 3519 | struct fifo_engine_info_gk20a *gr_info = f->engine_info + ENGINE_GR_GK20A; |
@@ -3579,8 +3579,8 @@ clean_up: | |||
3579 | return ret; | 3579 | return ret; |
3580 | } | 3580 | } |
3581 | 3581 | ||
3582 | static int gr_gk20a_add_zbc_depth(struct gk20a *g, struct gr_gk20a *gr, | 3582 | int gr_gk20a_add_zbc_depth(struct gk20a *g, struct gr_gk20a *gr, |
3583 | struct zbc_entry *depth_val, u32 index) | 3583 | struct zbc_entry *depth_val, u32 index) |
3584 | { | 3584 | { |
3585 | struct fifo_gk20a *f = &g->fifo; | 3585 | struct fifo_gk20a *f = &g->fifo; |
3586 | struct fifo_engine_info_gk20a *gr_info = f->engine_info + ENGINE_GR_GK20A; | 3586 | struct fifo_engine_info_gk20a *gr_info = f->engine_info + ENGINE_GR_GK20A; |
@@ -3716,7 +3716,7 @@ int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr, | |||
3716 | &gr->zbc_col_tbl[gr->max_used_color_index]; | 3716 | &gr->zbc_col_tbl[gr->max_used_color_index]; |
3717 | WARN_ON(c_tbl->ref_cnt != 0); | 3717 | WARN_ON(c_tbl->ref_cnt != 0); |
3718 | 3718 | ||
3719 | ret = gr_gk20a_add_zbc_color(g, gr, | 3719 | ret = g->ops.gr.add_zbc_color(g, gr, |
3720 | zbc_val, gr->max_used_color_index); | 3720 | zbc_val, gr->max_used_color_index); |
3721 | 3721 | ||
3722 | if (!ret) | 3722 | if (!ret) |
@@ -3746,7 +3746,7 @@ int gr_gk20a_add_zbc(struct gk20a *g, struct gr_gk20a *gr, | |||
3746 | &gr->zbc_dep_tbl[gr->max_used_depth_index]; | 3746 | &gr->zbc_dep_tbl[gr->max_used_depth_index]; |
3747 | WARN_ON(d_tbl->ref_cnt != 0); | 3747 | WARN_ON(d_tbl->ref_cnt != 0); |
3748 | 3748 | ||
3749 | ret = gr_gk20a_add_zbc_depth(g, gr, | 3749 | ret = g->ops.gr.add_zbc_depth(g, gr, |
3750 | zbc_val, gr->max_used_depth_index); | 3750 | zbc_val, gr->max_used_depth_index); |
3751 | 3751 | ||
3752 | if (!ret) | 3752 | if (!ret) |
@@ -3834,7 +3834,7 @@ static int gr_gk20a_load_zbc_table(struct gk20a *g, struct gr_gk20a *gr) | |||
3834 | c_tbl->color_l2, sizeof(zbc_val.color_l2)); | 3834 | c_tbl->color_l2, sizeof(zbc_val.color_l2)); |
3835 | zbc_val.format = c_tbl->format; | 3835 | zbc_val.format = c_tbl->format; |
3836 | 3836 | ||
3837 | ret = gr_gk20a_add_zbc_color(g, gr, &zbc_val, i); | 3837 | ret = g->ops.gr.add_zbc_color(g, gr, &zbc_val, i); |
3838 | 3838 | ||
3839 | if (ret) | 3839 | if (ret) |
3840 | return ret; | 3840 | return ret; |
@@ -3847,7 +3847,7 @@ static int gr_gk20a_load_zbc_table(struct gk20a *g, struct gr_gk20a *gr) | |||
3847 | zbc_val.depth = d_tbl->depth; | 3847 | zbc_val.depth = d_tbl->depth; |
3848 | zbc_val.format = d_tbl->format; | 3848 | zbc_val.format = d_tbl->format; |
3849 | 3849 | ||
3850 | ret = gr_gk20a_add_zbc_depth(g, gr, &zbc_val, i); | 3850 | ret = g->ops.gr.add_zbc_depth(g, gr, &zbc_val, i); |
3851 | if (ret) | 3851 | if (ret) |
3852 | return ret; | 3852 | return ret; |
3853 | } | 3853 | } |
@@ -7351,5 +7351,7 @@ void gk20a_init_gr_ops(struct gpu_ops *gops) | |||
7351 | gops->gr.is_tpc_addr = gr_gk20a_is_tpc_addr; | 7351 | gops->gr.is_tpc_addr = gr_gk20a_is_tpc_addr; |
7352 | gops->gr.get_tpc_num = gr_gk20a_get_tpc_num; | 7352 | gops->gr.get_tpc_num = gr_gk20a_get_tpc_num; |
7353 | gops->gr.detect_sm_arch = gr_gk20a_detect_sm_arch; | 7353 | gops->gr.detect_sm_arch = gr_gk20a_detect_sm_arch; |
7354 | gops->gr.add_zbc_color = gr_gk20a_add_zbc_color; | ||
7355 | gops->gr.add_zbc_depth = gr_gk20a_add_zbc_depth; | ||
7354 | } | 7356 | } |
7355 | 7357 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h index 72642a41..e5d315e5 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h | |||
@@ -456,4 +456,10 @@ void gk20a_suspend_all_sms(struct gk20a *g); | |||
456 | int gk20a_gr_lock_down_sm(struct gk20a *g, | 456 | int gk20a_gr_lock_down_sm(struct gk20a *g, |
457 | u32 gpc, u32 tpc, u32 global_esr_mask); | 457 | u32 gpc, u32 tpc, u32 global_esr_mask); |
458 | bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch); | 458 | bool gk20a_is_channel_ctx_resident(struct channel_gk20a *ch); |
459 | int gr_gk20a_add_zbc_color(struct gk20a *g, struct gr_gk20a *gr, | ||
460 | struct zbc_entry *color_val, u32 index); | ||
461 | int gr_gk20a_add_zbc_depth(struct gk20a *g, struct gr_gk20a *gr, | ||
462 | struct zbc_entry *depth_val, u32 index); | ||
463 | int gr_gk20a_wait_idle(struct gk20a *g, unsigned long end_jiffies, | ||
464 | u32 expect_delay); | ||
459 | #endif /*__GR_GK20A_H__*/ | 465 | #endif /*__GR_GK20A_H__*/ |