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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c28
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c7
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h1
3 files changed, 36 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 2fdf719a..493cbe80 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -246,6 +246,30 @@ static int gk20a_ctrl_get_tpc_masks(struct gk20a *g,
246 return err; 246 return err;
247} 247}
248 248
249static int gk20a_ctrl_get_fbp_l2_masks(
250 struct gk20a *g, struct nvgpu_gpu_get_fbp_l2_masks_args *args)
251{
252 struct gr_gk20a *gr = &g->gr;
253 int err = 0;
254 const u32 fbp_l2_mask_size = sizeof(u32) * gr->max_fbps_count;
255
256 if (args->mask_buf_size > 0) {
257 size_t write_size = fbp_l2_mask_size;
258
259 if (write_size > args->mask_buf_size)
260 write_size = args->mask_buf_size;
261
262 err = copy_to_user((void __user *)(uintptr_t)
263 args->mask_buf_addr,
264 gr->fbp_rop_l2_en_mask, write_size);
265 }
266
267 if (err == 0)
268 args->mask_buf_size = fbp_l2_mask_size;
269
270 return err;
271}
272
249static int nvgpu_gpu_ioctl_l2_fb_ops(struct gk20a *g, 273static int nvgpu_gpu_ioctl_l2_fb_ops(struct gk20a *g,
250 struct nvgpu_gpu_l2_fb_args *args) 274 struct nvgpu_gpu_l2_fb_args *args)
251{ 275{
@@ -936,6 +960,10 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
936 err = gk20a_ctrl_get_tpc_masks(g, 960 err = gk20a_ctrl_get_tpc_masks(g,
937 (struct nvgpu_gpu_get_tpc_masks_args *)buf); 961 (struct nvgpu_gpu_get_tpc_masks_args *)buf);
938 break; 962 break;
963 case NVGPU_GPU_IOCTL_GET_FBP_L2_MASKS:
964 err = gk20a_ctrl_get_fbp_l2_masks(g,
965 (struct nvgpu_gpu_get_fbp_l2_masks_args *)buf);
966 break;
939 case NVGPU_GPU_IOCTL_OPEN_CHANNEL: 967 case NVGPU_GPU_IOCTL_OPEN_CHANNEL:
940 /* this arg type here, but ..gpu_open_channel_args in nvgpu.h 968 /* this arg type here, but ..gpu_open_channel_args in nvgpu.h
941 * for consistency - they are the same */ 969 * for consistency - they are the same */
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 41ef5424..4dbdb777 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -3257,6 +3257,7 @@ static void gk20a_remove_gr_support(struct gr_gk20a *gr)
3257 kfree(gr->sm_to_cluster); 3257 kfree(gr->sm_to_cluster);
3258 kfree(gr->gpc_skip_mask); 3258 kfree(gr->gpc_skip_mask);
3259 kfree(gr->map_tiles); 3259 kfree(gr->map_tiles);
3260 kfree(gr->fbp_rop_l2_en_mask);
3260 gr->gpc_tpc_count = NULL; 3261 gr->gpc_tpc_count = NULL;
3261 gr->gpc_zcb_count = NULL; 3262 gr->gpc_zcb_count = NULL;
3262 gr->gpc_ppc_count = NULL; 3263 gr->gpc_ppc_count = NULL;
@@ -3266,6 +3267,7 @@ static void gk20a_remove_gr_support(struct gr_gk20a *gr)
3266 gr->pes_tpc_mask[1] = NULL; 3267 gr->pes_tpc_mask[1] = NULL;
3267 gr->gpc_skip_mask = NULL; 3268 gr->gpc_skip_mask = NULL;
3268 gr->map_tiles = NULL; 3269 gr->map_tiles = NULL;
3270 gr->fbp_rop_l2_en_mask = NULL;
3269 3271
3270 gr->ctx_vars.valid = false; 3272 gr->ctx_vars.valid = false;
3271 kfree(gr->ctx_vars.ucode.fecs.inst.l); 3273 kfree(gr->ctx_vars.ucode.fecs.inst.l);
@@ -3336,6 +3338,11 @@ static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
3336 3338
3337 gr->fbp_en_mask = g->ops.gr.get_fbp_en_mask(g); 3339 gr->fbp_en_mask = g->ops.gr.get_fbp_en_mask(g);
3338 3340
3341 gr->fbp_rop_l2_en_mask =
3342 kzalloc(gr->max_fbps_count * sizeof(u32), GFP_KERNEL);
3343 if (!gr->fbp_rop_l2_en_mask)
3344 goto clean_up;
3345
3339 tmp = gk20a_readl(g, top_tpc_per_gpc_r()); 3346 tmp = gk20a_readl(g, top_tpc_per_gpc_r());
3340 gr->max_tpc_per_gpc_count = top_tpc_per_gpc_value_v(tmp); 3347 gr->max_tpc_per_gpc_count = top_tpc_per_gpc_value_v(tmp);
3341 3348
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index 1b7bc252..d03f945c 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -351,6 +351,7 @@ struct gr_gk20a {
351 struct gr_t18x t18x; 351 struct gr_t18x t18x;
352#endif 352#endif
353 u32 fbp_en_mask; 353 u32 fbp_en_mask;
354 u32 *fbp_rop_l2_en_mask;
354 u32 no_of_sm; 355 u32 no_of_sm;
355 struct sm_info *sm_to_cluster; 356 struct sm_info *sm_to_cluster;
356 struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_states; 357 struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_states;