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-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h2
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.c13
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.h4
3 files changed, 3 insertions, 16 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 8dabee63..db38fae4 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -741,7 +741,7 @@ struct gpu_ops {
741 struct nvgpu_mem *mem, int size); 741 struct nvgpu_mem *mem, int size);
742 u32 (*get_big_page_sizes)(void); 742 u32 (*get_big_page_sizes)(void);
743 u32 (*get_default_big_page_size)(void); 743 u32 (*get_default_big_page_size)(void);
744 u32 (*get_physical_addr_bits)(struct gk20a *g); 744 u32 (*get_iommu_bit)(struct gk20a *g);
745 int (*init_mm_setup_hw)(struct gk20a *g); 745 int (*init_mm_setup_hw)(struct gk20a *g);
746 bool (*is_bar1_supported)(struct gk20a *g); 746 bool (*is_bar1_supported)(struct gk20a *g);
747 int (*init_bar2_vm)(struct gk20a *g); 747 int (*init_bar2_vm)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index 3d1f8d28..795f7bda 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -1271,17 +1271,6 @@ dma_addr_t gk20a_mm_gpuva_to_iova_base(struct vm_gk20a *vm, u64 gpu_vaddr)
1271 return addr; 1271 return addr;
1272} 1272}
1273 1273
1274u64 gk20a_mm_smmu_vaddr_translate(struct gk20a *g, u64 iova)
1275{
1276 /* ensure it is not vidmem allocation */
1277 WARN_ON(is_vidmem_page_alloc(iova));
1278
1279 if (nvgpu_iommuable(g) && g->ops.mm.get_physical_addr_bits)
1280 return iova | 1ULL << g->ops.mm.get_physical_addr_bits(g);
1281
1282 return iova;
1283}
1284
1285/* for gk20a the "video memory" apertures here are misnomers. */ 1274/* for gk20a the "video memory" apertures here are misnomers. */
1286static inline u32 big_valid_pde0_bits(struct gk20a *g, 1275static inline u32 big_valid_pde0_bits(struct gk20a *g,
1287 struct nvgpu_gmmu_pd *pd, u64 addr) 1276 struct nvgpu_gmmu_pd *pd, u64 addr)
@@ -2170,7 +2159,7 @@ int gk20a_mm_suspend(struct gk20a *g)
2170 return 0; 2159 return 0;
2171} 2160}
2172 2161
2173u32 gk20a_mm_get_physical_addr_bits(struct gk20a *g) 2162u32 gk20a_mm_get_iommu_bit(struct gk20a *g)
2174{ 2163{
2175 return 34; 2164 return 34;
2176} 2165}
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 13a3dcd0..9f03a495 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -342,8 +342,6 @@ void gk20a_mm_dump_vm(struct vm_gk20a *vm,
342 342
343int gk20a_mm_suspend(struct gk20a *g); 343int gk20a_mm_suspend(struct gk20a *g);
344 344
345u64 gk20a_mm_smmu_vaddr_translate(struct gk20a *g, dma_addr_t iova);
346
347void gk20a_mm_ltc_isr(struct gk20a *g); 345void gk20a_mm_ltc_isr(struct gk20a *g);
348 346
349bool gk20a_mm_mmu_debug_mode_enabled(struct gk20a *g); 347bool gk20a_mm_mmu_debug_mode_enabled(struct gk20a *g);
@@ -420,7 +418,7 @@ void pde_range_from_vaddr_range(struct vm_gk20a *vm,
420 u64 addr_lo, u64 addr_hi, 418 u64 addr_lo, u64 addr_hi,
421 u32 *pde_lo, u32 *pde_hi); 419 u32 *pde_lo, u32 *pde_hi);
422int gk20a_mm_pde_coverage_bit_count(struct vm_gk20a *vm); 420int gk20a_mm_pde_coverage_bit_count(struct vm_gk20a *vm);
423u32 gk20a_mm_get_physical_addr_bits(struct gk20a *g); 421u32 gk20a_mm_get_iommu_bit(struct gk20a *g);
424 422
425const struct gk20a_mmu_level *gk20a_mm_get_mmu_levels(struct gk20a *g, 423const struct gk20a_mmu_level *gk20a_mm_get_mmu_levels(struct gk20a *g,
426 u32 big_page_size); 424 u32 big_page_size);