diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 4 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hal_gk20a.c | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 8 |
3 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ce8d1d62..67a6123e 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -377,15 +377,15 @@ struct gpu_ops { | |||
377 | int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g); | 377 | int (*pmu_setup_hw_and_bootstrap)(struct gk20a *g); |
378 | int (*pmu_setup_elpg)(struct gk20a *g); | 378 | int (*pmu_setup_elpg)(struct gk20a *g); |
379 | int (*init_wpr_region)(struct gk20a *g); | 379 | int (*init_wpr_region)(struct gk20a *g); |
380 | bool lspmuwprinitdone; | 380 | u32 lspmuwprinitdone; |
381 | bool fecsbootstrapdone; | 381 | bool fecsbootstrapdone; |
382 | u32 fecsrecoveryinprogress; | ||
383 | } pmu; | 382 | } pmu; |
384 | struct { | 383 | struct { |
385 | int (*init_clk_support)(struct gk20a *g); | 384 | int (*init_clk_support)(struct gk20a *g); |
386 | int (*suspend_clk_support)(struct gk20a *g); | 385 | int (*suspend_clk_support)(struct gk20a *g); |
387 | } clk; | 386 | } clk; |
388 | bool privsecurity; | 387 | bool privsecurity; |
388 | bool securegpccs; | ||
389 | struct { | 389 | struct { |
390 | const struct regop_offset_range* ( | 390 | const struct regop_offset_range* ( |
391 | *get_global_whitelist_ranges)(void); | 391 | *get_global_whitelist_ranges)(void); |
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c index 5a9c38ea..b8268e1f 100644 --- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c | |||
@@ -52,6 +52,7 @@ int gk20a_init_hal(struct gk20a *g) | |||
52 | 52 | ||
53 | *gops = gk20a_ops; | 53 | *gops = gk20a_ops; |
54 | gops->privsecurity = 0; | 54 | gops->privsecurity = 0; |
55 | gops->securegpccs = 0; | ||
55 | gk20a_init_mc(gops); | 56 | gk20a_init_mc(gops); |
56 | gk20a_init_ltc(gops); | 57 | gk20a_init_ltc(gops); |
57 | gk20a_init_gr_ops(gops); | 58 | gk20a_init_gr_ops(gops); |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 6313b9d5..2456c784 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -3333,12 +3333,16 @@ int pmu_wait_message_cond(struct pmu_gk20a *pmu, u32 timeout, | |||
3333 | struct gk20a *g = gk20a_from_pmu(pmu); | 3333 | struct gk20a *g = gk20a_from_pmu(pmu); |
3334 | unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout); | 3334 | unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout); |
3335 | unsigned long delay = GR_IDLE_CHECK_DEFAULT; | 3335 | unsigned long delay = GR_IDLE_CHECK_DEFAULT; |
3336 | u32 servicedpmuint; | ||
3336 | 3337 | ||
3338 | servicedpmuint = pwr_falcon_irqstat_halt_true_f() | | ||
3339 | pwr_falcon_irqstat_exterr_true_f() | | ||
3340 | pwr_falcon_irqstat_swgen0_true_f(); | ||
3337 | do { | 3341 | do { |
3338 | if (*var == val) | 3342 | if (*var == val) |
3339 | return 0; | 3343 | return 0; |
3340 | 3344 | ||
3341 | if (gk20a_readl(g, pwr_falcon_irqstat_r())) | 3345 | if (gk20a_readl(g, pwr_falcon_irqstat_r()) & servicedpmuint) |
3342 | gk20a_pmu_isr(g); | 3346 | gk20a_pmu_isr(g); |
3343 | 3347 | ||
3344 | usleep_range(delay, delay * 2); | 3348 | usleep_range(delay, delay * 2); |
@@ -4042,8 +4046,6 @@ int gk20a_pmu_destroy(struct gk20a *g) | |||
4042 | pmu->zbc_ready = false; | 4046 | pmu->zbc_ready = false; |
4043 | g->ops.pmu.lspmuwprinitdone = false; | 4047 | g->ops.pmu.lspmuwprinitdone = false; |
4044 | g->ops.pmu.fecsbootstrapdone = false; | 4048 | g->ops.pmu.fecsbootstrapdone = false; |
4045 | g->ops.pmu.fecsrecoveryinprogress = 0; | ||
4046 | |||
4047 | 4049 | ||
4048 | gk20a_dbg_fn("done"); | 4050 | gk20a_dbg_fn("done"); |
4049 | return 0; | 4051 | return 0; |