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path: root/drivers/gpu/nvgpu/gk20a
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c11
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h8
2 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 08e8b79f..ed48253f 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -274,12 +274,23 @@ int gk20a_finalize_poweron(struct gk20a *g)
274 } 274 }
275 } 275 }
276 276
277 nvgpu_mutex_acquire(&g->tpc_pg_lock);
278
279 if (g->can_tpc_powergate) {
280 if (g->ops.gr.powergate_tpc != NULL) {
281 g->ops.gr.powergate_tpc(g);
282 }
283 }
284
277 err = gk20a_init_gr_support(g); 285 err = gk20a_init_gr_support(g);
278 if (err) { 286 if (err) {
279 nvgpu_err(g, "failed to init gk20a gr"); 287 nvgpu_err(g, "failed to init gk20a gr");
288 nvgpu_mutex_release(&g->tpc_pg_lock);
280 goto done; 289 goto done;
281 } 290 }
282 291
292 nvgpu_mutex_release(&g->tpc_pg_lock);
293
283 if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) { 294 if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
284 err = gk20a_init_pstate_pmu_support(g); 295 err = gk20a_init_pstate_pmu_support(g);
285 if (err) { 296 if (err) {
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 948d8e60..4934958c 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -307,6 +307,7 @@ struct gpu_ops {
307 u32 class, u32 padding); 307 u32 class, u32 padding);
308 void (*free_gr_ctx)(struct gk20a *g, 308 void (*free_gr_ctx)(struct gk20a *g,
309 struct vm_gk20a *vm, struct nvgpu_gr_ctx *gr_ctx); 309 struct vm_gk20a *vm, struct nvgpu_gr_ctx *gr_ctx);
310 void (*powergate_tpc)(struct gk20a *g);
310 void (*update_ctxsw_preemption_mode)(struct gk20a *g, 311 void (*update_ctxsw_preemption_mode)(struct gk20a *g,
311 struct channel_gk20a *c, 312 struct channel_gk20a *c,
312 struct nvgpu_mem *mem); 313 struct nvgpu_mem *mem);
@@ -1361,6 +1362,8 @@ struct gk20a {
1361 u64 log_mask; 1362 u64 log_mask;
1362 u32 log_trace; 1363 u32 log_trace;
1363 1364
1365 struct nvgpu_mutex tpc_pg_lock;
1366
1364 struct nvgpu_gpu_params params; 1367 struct nvgpu_gpu_params params;
1365 1368
1366 /* 1369 /*
@@ -1532,6 +1535,11 @@ struct gk20a {
1532 1535
1533 u32 tpc_fs_mask_user; 1536 u32 tpc_fs_mask_user;
1534 1537
1538 u32 tpc_pg_mask;
1539 bool can_tpc_powergate;
1540
1541 u32 valid_tpc_mask;
1542
1535 struct nvgpu_bios bios; 1543 struct nvgpu_bios bios;
1536 bool bios_is_init; 1544 bool bios_is_init;
1537 1545