6 files changed, 21 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 75df4ce5..ce23c59a 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -92,4 +92,8 @@ void gk20a_ce2_nonstall_isr(struct gk20a *g)
 
         return;
 }
-
+void gk20a_init_ce2(struct gpu_ops *gops)
+{
+        gops->ce2.isr_stall = gk20a_ce2_isr;
+        gops->ce2.isr_nonstall = gk20a_ce2_nonstall_isr;
+}
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h
index 0a9ec62a..bf4e3066 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h
@@ -24,6 +24,7 @@
 #include "channel_gk20a.h"
 #include "tsg_gk20a.h"
 
+void gk20a_init_ce2(struct gpu_ops *gops);
 void gk20a_ce2_isr(struct gk20a *g);
 void gk20a_ce2_nonstall_isr(struct gk20a *g);
 
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index b9183e76..cf1242ab 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -145,6 +145,9 @@ u32 gk20a_fifo_engine_interrupt_mask(struct gk20a *g)
 
         for (i = 0; i < g->fifo.max_engines; i++) {
                 u32 intr_id = g->fifo.engine_info[i].intr_id;
+                if (i == ENGINE_CE2_GK20A &&
+                        (!g->ops.ce2.isr_stall || !g->ops.ce2.isr_nonstall))
+                        continue;
 
                 if (intr_id)
                         eng_intr_mask |= BIT(intr_id);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index ef8068e5..1157390a 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -88,6 +88,10 @@ struct gpu_ops {
                 void (*flush)(struct gk20a *g);
         } ltc;
         struct {
+                void (*isr_stall)(struct gk20a *g);
+                void (*isr_nonstall)(struct gk20a *g);
+        } ce2;
+        struct {
                 int (*init_fs_state)(struct gk20a *g);
                 void (*access_smpc_reg)(struct gk20a *g, u32 quad, u32 offset);
                 void (*bundle_cb_defaults)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
index 0e97d551..5a9c38ea 100644
--- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c
@@ -42,7 +42,7 @@ static struct gpu_ops gk20a_ops = {
                         gr_gk20a_pg_gr_load_gating_prod,
                 .slcg_therm_load_gating_prod =
                         gr_gk20a_slcg_therm_load_gating_prod,
-        }
+        },
 };
 
 int gk20a_init_hal(struct gk20a *g)
@@ -57,6 +57,7 @@ int gk20a_init_hal(struct gk20a *g)
         gk20a_init_gr_ops(gops);
         gk20a_init_fb(gops);
         gk20a_init_fifo(gops);
+        gk20a_init_ce2(gops);
         gk20a_init_gr_ctx(gops);
         gk20a_init_mm(gops);
         gk20a_init_pmu_ops(gops);
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
index 86fea3a1..4aca3424 100644
--- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c
@@ -80,8 +80,9 @@ irqreturn_t mc_gk20a_intr_thread_stall(struct gk20a *g)
 
         if (mc_intr_0 & BIT(g->fifo.engine_info[ENGINE_GR_GK20A].intr_id))
                 gr_gk20a_elpg_protected_call(g, gk20a_gr_isr(g));
-        if (mc_intr_0 & BIT(g->fifo.engine_info[ENGINE_CE2_GK20A].intr_id))
-                gk20a_ce2_isr(g);
+        if (mc_intr_0 & BIT(g->fifo.engine_info[ENGINE_CE2_GK20A].intr_id)
+                && g->ops.ce2.isr_stall)
+                g->ops.ce2.isr_stall(g);
         if (mc_intr_0 & mc_intr_0_pfifo_pending_f())
                 gk20a_fifo_isr(g);
         if (mc_intr_0 & mc_intr_0_pmu_pending_f())
@@ -118,8 +119,9 @@ irqreturn_t mc_gk20a_intr_thread_nonstall(struct gk20a *g)
                 gk20a_fifo_nonstall_isr(g);
         if (mc_intr_1 & BIT(g->fifo.engine_info[ENGINE_GR_GK20A].intr_id))
                 gk20a_gr_nonstall_isr(g);
-        if (mc_intr_1 & BIT(g->fifo.engine_info[ENGINE_CE2_GK20A].intr_id))
-                gk20a_ce2_nonstall_isr(g);
+        if (mc_intr_1 & BIT(g->fifo.engine_info[ENGINE_CE2_GK20A].intr_id)
+                && g->ops.ce2.isr_nonstall)
+                g->ops.ce2.isr_nonstall(g);
 
         gk20a_writel(g, mc_intr_en_1_r(),
                 mc_intr_en_1_inta_hardware_f());