summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ce2_gk20a.c8
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c7
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.h3
-rw-r--r--drivers/gpu/nvgpu/gk20a/tsg_gk20a.c4
-rw-r--r--drivers/gpu/nvgpu/gk20a/tsg_gk20a.h2
5 files changed, 14 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 87eff813..6da65abd 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GK20A Graphics Copy Engine (gr host) 2 * GK20A Graphics Copy Engine (gr host)
3 * 3 *
4 * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -24,6 +24,7 @@
24 24
25#include <nvgpu/kmem.h> 25#include <nvgpu/kmem.h>
26#include <nvgpu/dma.h> 26#include <nvgpu/dma.h>
27#include <nvgpu/os_sched.h>
27 28
28#include "gk20a.h" 29#include "gk20a.h"
29 30
@@ -430,7 +431,7 @@ u32 gk20a_ce_create_context(struct gk20a *g,
430 ce_ctx->vm = g->mm.ce.vm; 431 ce_ctx->vm = g->mm.ce.vm;
431 432
432 /* allocate a tsg if needed */ 433 /* allocate a tsg if needed */
433 ce_ctx->tsg = gk20a_tsg_open(g); 434 ce_ctx->tsg = gk20a_tsg_open(g, nvgpu_current_pid(g));
434 if (!ce_ctx->tsg) { 435 if (!ce_ctx->tsg) {
435 nvgpu_err(g, "ce: gk20a tsg not available"); 436 nvgpu_err(g, "ce: gk20a tsg not available");
436 err = -ENOMEM; 437 err = -ENOMEM;
@@ -438,7 +439,8 @@ u32 gk20a_ce_create_context(struct gk20a *g,
438 } 439 }
439 440
440 /* always kernel client needs privileged channel */ 441 /* always kernel client needs privileged channel */
441 ce_ctx->ch = gk20a_open_new_channel(g, runlist_id, true); 442 ce_ctx->ch = gk20a_open_new_channel(g, runlist_id, true,
443 nvgpu_current_pid(g), nvgpu_current_tid(g));
442 if (!ce_ctx->ch) { 444 if (!ce_ctx->ch) {
443 nvgpu_err(g, "ce: gk20a channel not available"); 445 nvgpu_err(g, "ce: gk20a channel not available");
444 err = -ENOMEM; 446 err = -ENOMEM;
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index f50c37a7..2f5514a8 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -615,7 +615,8 @@ void __gk20a_channel_kill(struct channel_gk20a *ch)
615 615
616struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g, 616struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g,
617 s32 runlist_id, 617 s32 runlist_id,
618 bool is_privileged_channel) 618 bool is_privileged_channel,
619 pid_t pid, pid_t tid)
619{ 620{
620 struct fifo_gk20a *f = &g->fifo; 621 struct fifo_gk20a *f = &g->fifo;
621 struct channel_gk20a *ch; 622 struct channel_gk20a *ch;
@@ -645,8 +646,8 @@ struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g,
645 /* Channel privilege level */ 646 /* Channel privilege level */
646 ch->is_privileged_channel = is_privileged_channel; 647 ch->is_privileged_channel = is_privileged_channel;
647 648
648 ch->pid = nvgpu_current_tid(g); 649 ch->pid = tid;
649 ch->tgid = nvgpu_current_pid(g); /* process granularity for FECS traces */ 650 ch->tgid = pid; /* process granularity for FECS traces */
650 651
651 if (g->ops.fifo.alloc_inst(g, ch)) { 652 if (g->ops.fifo.alloc_inst(g, ch)) {
652 ch->g = NULL; 653 ch->g = NULL;
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index 7fcc54cc..2b8be069 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -367,7 +367,8 @@ int gk20a_wait_channel_idle(struct channel_gk20a *ch);
367/* runlist_id -1 is synonym for ENGINE_GR_GK20A runlist id */ 367/* runlist_id -1 is synonym for ENGINE_GR_GK20A runlist id */
368struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g, 368struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g,
369 s32 runlist_id, 369 s32 runlist_id,
370 bool is_privileged_channel); 370 bool is_privileged_channel,
371 pid_t pid, pid_t tid);
371 372
372int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c, 373int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c,
373 struct nvgpu_gpfifo_args *gpfifo_args); 374 struct nvgpu_gpfifo_args *gpfifo_args);
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index ccb456cf..05b8fc61 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -267,7 +267,7 @@ static struct tsg_gk20a *gk20a_tsg_acquire_unused_tsg(struct fifo_gk20a *f)
267 return tsg; 267 return tsg;
268} 268}
269 269
270struct tsg_gk20a *gk20a_tsg_open(struct gk20a *g) 270struct tsg_gk20a *gk20a_tsg_open(struct gk20a *g, pid_t pid)
271{ 271{
272 struct tsg_gk20a *tsg; 272 struct tsg_gk20a *tsg;
273 int err; 273 int err;
@@ -286,7 +286,7 @@ struct tsg_gk20a *gk20a_tsg_open(struct gk20a *g)
286 tsg->timeslice_timeout = 0; 286 tsg->timeslice_timeout = 0;
287 tsg->timeslice_scale = 0; 287 tsg->timeslice_scale = 0;
288 tsg->runlist_id = ~0; 288 tsg->runlist_id = ~0;
289 tsg->tgid = nvgpu_current_pid(g); 289 tsg->tgid = pid;
290 290
291 if (g->ops.fifo.init_eng_method_buffers) 291 if (g->ops.fifo.init_eng_method_buffers)
292 g->ops.fifo.init_eng_method_buffers(g, tsg); 292 g->ops.fifo.init_eng_method_buffers(g, tsg);
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h
index f97dbb26..2f76477f 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.h
@@ -33,7 +33,7 @@
33struct channel_gk20a; 33struct channel_gk20a;
34 34
35bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch); 35bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch);
36struct tsg_gk20a *gk20a_tsg_open(struct gk20a *g); 36struct tsg_gk20a *gk20a_tsg_open(struct gk20a *g, pid_t pid);
37void gk20a_tsg_release(struct nvgpu_ref *ref); 37void gk20a_tsg_release(struct nvgpu_ref *ref);
38 38
39int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid); 39int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid);