4 files changed, 31 insertions, 122 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
index f0927692..74de7e8e 100644
--- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c
@@ -26,6 +26,7 @@
 #include <trace/events/gk20a.h>
 
 #include <nvgpu/dma.h>
+#include <nvgpu/gmmu.h>
 #include <nvgpu/timers.h>
 #include <nvgpu/nvgpu_common.h>
 #include <nvgpu/kmem.h>
@@ -83,8 +84,8 @@ __must_hold(&cde_app->mutex)
 
         /* release mapped memory */
         gk20a_deinit_cde_img(cde_ctx);
-        gk20a_gmmu_unmap(vm, cde_ctx->backing_store_vaddr,
-                         g->gr.compbit_store.mem.size, 1);
+        nvgpu_gmmu_unmap(vm, &g->gr.compbit_store.mem,
+                         cde_ctx->backing_store_vaddr);
 
         /* free the channel */
         gk20a_channel_close(ch);
@@ -1241,7 +1242,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
         }
 
         /* map backing store to gpu virtual space */
-        vaddr = gk20a_gmmu_map(ch->vm, &gr->compbit_store.mem.priv.sgt,
+        vaddr = nvgpu_gmmu_map(ch->vm, &gr->compbit_store.mem,
                                g->gr.compbit_store.mem.size,
                                NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
                                gk20a_mem_flag_read_only,
@@ -1272,7 +1273,7 @@ static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx)
         return 0;
 
 err_init_cde_img:
-        gk20a_gmmu_unmap(ch->vm, vaddr, g->gr.compbit_store.mem.size, 1);
+        nvgpu_gmmu_unmap(ch->vm, &g->gr.compbit_store.mem, vaddr);
 err_map_backingstore:
 err_alloc_gpfifo:
         gk20a_vm_put(ch->vm);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 77a947de..2f52fdcf 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -21,6 +21,7 @@
 
 #include <nvgpu/dma.h>
 #include <nvgpu/kmem.h>
+#include <nvgpu/gmmu.h>
 #include <nvgpu/timers.h>
 #include <nvgpu/nvgpu_common.h>
 #include <nvgpu/log.h>
@@ -1946,8 +1947,8 @@ int gr_gk20a_update_hwpm_ctxsw_mode(struct gk20a *g,
                                 return ret;
                         }
 
-                        pm_ctx->mem.gpu_va = gk20a_gmmu_map(c->vm,
-                                                        &pm_ctx->mem.priv.sgt,
+                        pm_ctx->mem.gpu_va = nvgpu_gmmu_map(c->vm,
+                                                        &pm_ctx->mem,
                                                         pm_ctx->mem.size,
                                                         NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
                                                         gk20a_mem_flag_none, true,
@@ -2013,8 +2014,7 @@ int gr_gk20a_update_hwpm_ctxsw_mode(struct gk20a *g,
 clean_up_mem:
         nvgpu_mem_end(g, gr_mem);
 cleanup_pm_buf:
-        gk20a_gmmu_unmap(c->vm, pm_ctx->mem.gpu_va, pm_ctx->mem.size,
-                        gk20a_mem_flag_none);
+        nvgpu_gmmu_unmap(c->vm, &pm_ctx->mem, pm_ctx->mem.gpu_va);
         nvgpu_dma_free(g, &pm_ctx->mem);
         memset(&pm_ctx->mem, 0, sizeof(struct nvgpu_mem));
 
@@ -2198,8 +2198,8 @@ static int gr_gk20a_init_ctxsw_ucode_vaspace(struct gk20a *g)
         g->ops.mm.init_inst_block(&ucode_info->inst_blk_desc, vm, 0);
 
         /* Map ucode surface to GMMU */
-        ucode_info->surface_desc.gpu_va = gk20a_gmmu_map(vm,
-                                        &ucode_info->surface_desc.priv.sgt,
+        ucode_info->surface_desc.gpu_va = nvgpu_gmmu_map(vm,
+                                        &ucode_info->surface_desc,
                                         ucode_info->surface_desc.size,
                                         0, /* flags */
                                         gk20a_mem_flag_read_only,
@@ -2331,10 +2331,10 @@ int gr_gk20a_init_ctxsw_ucode(struct gk20a *g)
 
         return 0;
 
- clean_up:
+clean_up:
         if (ucode_info->surface_desc.gpu_va)
-                gk20a_gmmu_unmap(vm, ucode_info->surface_desc.gpu_va,
-                        ucode_info->surface_desc.size, gk20a_mem_flag_none);
+                nvgpu_gmmu_unmap(vm, &ucode_info->surface_desc,
+                                 ucode_info->surface_desc.gpu_va);
         nvgpu_dma_free(g, &ucode_info->surface_desc);
 
         nvgpu_release_firmware(g, gpccs_fw);
@@ -2824,7 +2824,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
                 mem = &gr->global_ctx_buffer[CIRCULAR_VPR].mem;
         }
 
-        gpu_va = gk20a_gmmu_map(ch_vm, &mem->priv.sgt, mem->size,
+        gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size,
                                 NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
                                 gk20a_mem_flag_none, true, mem->aperture);
         if (!gpu_va)
@@ -2840,7 +2840,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
                 mem = &gr->global_ctx_buffer[ATTRIBUTE_VPR].mem;
         }
 
-        gpu_va = gk20a_gmmu_map(ch_vm, &mem->priv.sgt, mem->size,
+        gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size,
                                 NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
                                 gk20a_mem_flag_none, false, mem->aperture);
         if (!gpu_va)
@@ -2856,7 +2856,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
                 mem = &gr->global_ctx_buffer[PAGEPOOL_VPR].mem;
         }
 
-        gpu_va = gk20a_gmmu_map(ch_vm, &mem->priv.sgt, mem->size,
+        gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size,
                                 NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_TRUE,
                                 gk20a_mem_flag_none, true, mem->aperture);
         if (!gpu_va)
@@ -2866,7 +2866,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
 
         /* Golden Image */
         mem = &gr->global_ctx_buffer[GOLDEN_CTX].mem;
-        gpu_va = gk20a_gmmu_map(ch_vm, &mem->priv.sgt, mem->size, 0,
+        gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size, 0,
                                 gk20a_mem_flag_none, true, mem->aperture);
         if (!gpu_va)
                 goto clean_up;
@@ -2875,7 +2875,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
 
         /* Priv register Access Map */
         mem = &gr->global_ctx_buffer[PRIV_ACCESS_MAP].mem;
-        gpu_va = gk20a_gmmu_map(ch_vm, &mem->priv.sgt, mem->size, 0,
+        gpu_va = nvgpu_gmmu_map(ch_vm, mem, mem->size, 0,
                                 gk20a_mem_flag_none, true, mem->aperture);
         if (!gpu_va)
                 goto clean_up;
@@ -2885,12 +2885,11 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
         c->ch_ctx.global_ctx_buffer_mapped = true;
         return 0;
 
- clean_up:
+clean_up:
         for (i = 0; i < NR_GLOBAL_CTX_BUF_VA; i++) {
                 if (g_bfr_va[i]) {
-                        gk20a_gmmu_unmap(ch_vm, g_bfr_va[i],
-                                         gr->global_ctx_buffer[i].mem.size,
-                                         gk20a_mem_flag_none);
+                        nvgpu_gmmu_unmap(ch_vm, &gr->global_ctx_buffer[i].mem,
+                                         g_bfr_va[i]);
                         g_bfr_va[i] = 0;
                 }
         }
@@ -2900,6 +2899,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
 static void gr_gk20a_unmap_global_ctx_buffers(struct channel_gk20a *c)
 {
         struct vm_gk20a *ch_vm = c->vm;
+        struct gr_gk20a *gr = &c->g->gr;
         u64 *g_bfr_va = c->ch_ctx.global_ctx_buffer_va;
         u64 *g_bfr_size = c->ch_ctx.global_ctx_buffer_size;
         u32 i;
@@ -2908,9 +2908,8 @@ static void gr_gk20a_unmap_global_ctx_buffers(struct channel_gk20a *c)
 
         for (i = 0; i < NR_GLOBAL_CTX_BUF_VA; i++) {
                 if (g_bfr_va[i]) {
-                        gk20a_gmmu_unmap(ch_vm, g_bfr_va[i],
-                                         g_bfr_size[i],
-                                         gk20a_mem_flag_none);
+                        nvgpu_gmmu_unmap(ch_vm, &gr->global_ctx_buffer[i].mem,
+                                         g_bfr_va[i]);
                         g_bfr_va[i] = 0;
                         g_bfr_size[i] = 0;
                 }
@@ -2946,8 +2945,8 @@ int gr_gk20a_alloc_gr_ctx(struct gk20a *g,
         if (err)
                 goto err_free_ctx;
 
-        gr_ctx->mem.gpu_va = gk20a_gmmu_map(vm,
-                                        &gr_ctx->mem.priv.sgt,
+        gr_ctx->mem.gpu_va = nvgpu_gmmu_map(vm,
+                                        &gr_ctx->mem,
                                         gr_ctx->mem.size,
                                         NVGPU_MAP_BUFFER_FLAGS_CACHEABLE_FALSE,
                                         gk20a_mem_flag_none, true,
@@ -3007,8 +3006,7 @@ void gr_gk20a_free_gr_ctx(struct gk20a *g,
         if (!gr_ctx || !gr_ctx->mem.gpu_va)
                 return;
 
-        gk20a_gmmu_unmap(vm, gr_ctx->mem.gpu_va,
-                gr_ctx->mem.size, gk20a_mem_flag_none);
+        nvgpu_gmmu_unmap(vm, &gr_ctx->mem, gr_ctx->mem.gpu_va);
         nvgpu_dma_free(g, &gr_ctx->mem);
         nvgpu_kfree(g, gr_ctx);
 }
@@ -3055,8 +3053,8 @@ static void gr_gk20a_free_channel_patch_ctx(struct channel_gk20a *c)
         gk20a_dbg_fn("");
 
         if (patch_ctx->mem.gpu_va)
-                gk20a_gmmu_unmap(c->vm, patch_ctx->mem.gpu_va,
-                                 patch_ctx->mem.size, gk20a_mem_flag_none);
+                nvgpu_gmmu_unmap(c->vm, &patch_ctx->mem,
+                                 patch_ctx->mem.gpu_va);
 
         nvgpu_dma_free(g, &patch_ctx->mem);
         patch_ctx->data_count = 0;
@@ -3070,8 +3068,7 @@ static void gr_gk20a_free_channel_pm_ctx(struct channel_gk20a *c)
         gk20a_dbg_fn("");
 
         if (pm_ctx->mem.gpu_va) {
-                gk20a_gmmu_unmap(c->vm, pm_ctx->mem.gpu_va,
-                                 pm_ctx->mem.size, gk20a_mem_flag_none);
+                nvgpu_gmmu_unmap(c->vm, &pm_ctx->mem, pm_ctx->mem.gpu_va);
 
                 nvgpu_dma_free(g, &pm_ctx->mem);
         }
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
index d95a2cde..08c99895 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c
@@ -2441,74 +2441,6 @@ int gk20a_vm_map_compbits(struct vm_gk20a *vm,
         return 0;
 }
 
-/*
- * Core GMMU map function for the kernel to use. If @addr is 0 then the GPU
- * VA will be allocated for you. If addr is non-zero then the buffer will be
- * mapped at @addr.
- */
-static u64 __gk20a_gmmu_map(struct vm_gk20a *vm,
-                            struct sg_table **sgt,
-                            u64 addr,
-                            u64 size,
-                            u32 flags,
-                            int rw_flag,
-                            bool priv,
-                            enum nvgpu_aperture aperture)
-{
-        struct gk20a *g = gk20a_from_vm(vm);
-        u64 vaddr;
-
-        nvgpu_mutex_acquire(&vm->update_gmmu_lock);
-        vaddr = g->ops.mm.gmmu_map(vm, addr,
-                                *sgt, /* sg table */
-                                0, /* sg offset */
-                                size,
-                                gmmu_page_size_kernel,
-                                0, /* kind */
-                                0, /* ctag_offset */
-                                flags, rw_flag,
-                                false, /* clear_ctags */
-                                false, /* sparse */
-                                priv, /* priv */
-                                NULL, /* mapping_batch handle */
-                                aperture);
-        nvgpu_mutex_release(&vm->update_gmmu_lock);
-        if (!vaddr) {
-                nvgpu_err(g, "failed to allocate va space");
-                return 0;
-        }
-
-        return vaddr;
-}
-
-u64 gk20a_gmmu_map(struct vm_gk20a *vm,
-                   struct sg_table **sgt,
-                   u64 size,
-                   u32 flags,
-                   int rw_flag,
-                   bool priv,
-                   enum nvgpu_aperture aperture)
-{
-        return __gk20a_gmmu_map(vm, sgt, 0, size, flags, rw_flag, priv,
-                        aperture);
-}
-
-/*
- * Like gk20a_gmmu_map() except it works on a fixed address instead.
- */
-u64 gk20a_gmmu_fixed_map(struct vm_gk20a *vm,
-                         struct sg_table **sgt,
-                         u64 addr,
-                         u64 size,
-                         u32 flags,
-                         int rw_flag,
-                         bool priv,
-                         enum nvgpu_aperture aperture)
-{
-        return __gk20a_gmmu_map(vm, sgt, addr, size, flags, rw_flag, priv,
-                        aperture);
-}
-
 #if defined(CONFIG_GK20A_VIDMEM)
 static int gk20a_gmmu_clear_vidmem_mem(struct gk20a *g, struct nvgpu_mem *mem)
 {
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 9717efff..0a102cb2 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -509,22 +509,6 @@ bool gk20a_mm_mmu_debug_mode_enabled(struct gk20a *g);
 
 int gk20a_mm_mmu_vpr_info_fetch(struct gk20a *g);
 
-u64 gk20a_gmmu_map(struct vm_gk20a *vm,
-                struct sg_table **sgt,
-                u64 size,
-                u32 flags,
-                int rw_flag,
-                bool priv,
-                enum nvgpu_aperture aperture);
-u64 gk20a_gmmu_fixed_map(struct vm_gk20a *vm,
-                struct sg_table **sgt,
-                u64 addr,
-                u64 size,
-                u32 flags,
-                int rw_flag,
-                bool priv,
-                enum nvgpu_aperture aperture);
-
 static inline phys_addr_t gk20a_mem_phys(struct nvgpu_mem *mem)
 {
         /* FIXME: the sgt/sgl may get null if this is accessed e.g. in an isr
@@ -565,11 +549,6 @@ u64 gk20a_locked_gmmu_map(struct vm_gk20a *vm,
                         struct vm_gk20a_mapping_batch *batch,
                         enum nvgpu_aperture aperture);
 
-void gk20a_gmmu_unmap(struct vm_gk20a *vm,
-                u64 vaddr,
-                u64 size,
-                int rw_flag);
-
 void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm,
                         u64 vaddr,
                         u64 size,