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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c2
-rw-r--r--drivers/gpu/nvgpu/gk20a/fifo_gk20a.c7
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index da73d95d..58175141 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -853,6 +853,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch)
853 unsigned long timeout = gk20a_get_gr_idle_timeout(g); 853 unsigned long timeout = gk20a_get_gr_idle_timeout(g);
854 struct dbg_session_gk20a *dbg_s; 854 struct dbg_session_gk20a *dbg_s;
855 bool was_reset; 855 bool was_reset;
856
856 gk20a_dbg_fn(""); 857 gk20a_dbg_fn("");
857 858
858 WARN_ON(ch->g == NULL); 859 WARN_ON(ch->g == NULL);
@@ -901,6 +902,7 @@ static void gk20a_free_channel(struct channel_gk20a *ch)
901 /* if lock is already taken, a reset is taking place 902 /* if lock is already taken, a reset is taking place
902 so no need to repeat */ 903 so no need to repeat */
903 if (!was_reset) { 904 if (!was_reset) {
905 trace_gk20a_channel_reset(ch->hw_chid, ch->tsgid);
904 gk20a_fifo_reset_engine(g, 906 gk20a_fifo_reset_engine(g,
905 g->fifo.deferred_fault_engines); 907 g->fifo.deferred_fault_engines);
906 } 908 }
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 9421c017..27a3992d 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -1053,8 +1053,13 @@ static bool gk20a_fifo_handle_mmu_fault(
1053 mutex_lock(&g->fifo.gr_reset_mutex); 1053 mutex_lock(&g->fifo.gr_reset_mutex);
1054 /* if lock is already taken, a reset is taking place 1054 /* if lock is already taken, a reset is taking place
1055 so no need to repeat */ 1055 so no need to repeat */
1056 if (!was_reset) 1056 if (!was_reset) {
1057 trace_gk20a_channel_reset(
1058 ch ? ch->hw_chid : ~0,
1059 tsg ? tsg->tsgid :
1060 NVGPU_INVALID_TSG_ID);
1057 gk20a_fifo_reset_engine(g, engine_id); 1061 gk20a_fifo_reset_engine(g, engine_id);
1062 }
1058 mutex_unlock(&g->fifo.gr_reset_mutex); 1063 mutex_unlock(&g->fifo.gr_reset_mutex);
1059 } 1064 }
1060 /* disable the channel/TSG from hw and increment 1065 /* disable the channel/TSG from hw and increment