diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/bus_gk20a.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/bus_gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 11 |
4 files changed, 18 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/bus_gk20a.c b/drivers/gpu/nvgpu/gk20a/bus_gk20a.c index 81a5facc..ab75e8d7 100644 --- a/drivers/gpu/nvgpu/gk20a/bus_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/bus_gk20a.c | |||
@@ -34,6 +34,9 @@ | |||
34 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 34 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
35 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> | 35 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> |
36 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> | 36 | #include <nvgpu/hw/gk20a/hw_timer_gk20a.h> |
37 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h> | ||
38 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h> | ||
39 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h> | ||
37 | 40 | ||
38 | void gk20a_bus_init_hw(struct gk20a *g) | 41 | void gk20a_bus_init_hw(struct gk20a *g) |
39 | { | 42 | { |
@@ -172,3 +175,14 @@ int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst) | |||
172 | 175 | ||
173 | return 0; | 176 | return 0; |
174 | } | 177 | } |
178 | |||
179 | void gk20a_bus_set_ppriv_timeout_settings(struct gk20a *g) | ||
180 | { | ||
181 | /* | ||
182 | * Bug 1340570: increase the clock timeout to avoid potential | ||
183 | * operation failure at high gpcclk rate. Default values are 0x400. | ||
184 | */ | ||
185 | nvgpu_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); | ||
186 | nvgpu_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); | ||
187 | nvgpu_writel(g, pri_ringstation_fbp_master_config_r(0x8), 0x800); | ||
188 | } | ||
diff --git a/drivers/gpu/nvgpu/gk20a/bus_gk20a.h b/drivers/gpu/nvgpu/gk20a/bus_gk20a.h index 1f81a4b0..8c07d1fe 100644 --- a/drivers/gpu/nvgpu/gk20a/bus_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/bus_gk20a.h | |||
@@ -32,5 +32,6 @@ void gk20a_bus_isr(struct gk20a *g); | |||
32 | int gk20a_read_ptimer(struct gk20a *g, u64 *value); | 32 | int gk20a_read_ptimer(struct gk20a *g, u64 *value); |
33 | void gk20a_bus_init_hw(struct gk20a *g); | 33 | void gk20a_bus_init_hw(struct gk20a *g); |
34 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst); | 34 | int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst); |
35 | void gk20a_bus_set_ppriv_timeout_settings(struct gk20a *g); | ||
35 | 36 | ||
36 | #endif /* GK20A_H */ | 37 | #endif /* GK20A_H */ |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2e7bd4a5..bb0b572f 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -1094,6 +1094,7 @@ struct gpu_ops { | |||
1094 | u32 source_id, u32 count, | 1094 | u32 source_id, u32 count, |
1095 | struct nvgpu_cpu_time_correlation_sample *); | 1095 | struct nvgpu_cpu_time_correlation_sample *); |
1096 | int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); | 1096 | int (*bar1_bind)(struct gk20a *g, struct nvgpu_mem *bar1_inst); |
1097 | void (*set_ppriv_timeout_settings)(struct gk20a *g); | ||
1097 | } bus; | 1098 | } bus; |
1098 | 1099 | ||
1099 | struct { | 1100 | struct { |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index ed1f9af9..51bb2551 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -53,9 +53,6 @@ | |||
53 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | 53 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> |
54 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> | 54 | #include <nvgpu/hw/gk20a/hw_ram_gk20a.h> |
55 | #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> | 55 | #include <nvgpu/hw/gk20a/hw_pri_ringmaster_gk20a.h> |
56 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_sys_gk20a.h> | ||
57 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_gpc_gk20a.h> | ||
58 | #include <nvgpu/hw/gk20a/hw_pri_ringstation_fbp_gk20a.h> | ||
59 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> | 56 | #include <nvgpu/hw/gk20a/hw_top_gk20a.h> |
60 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> | 57 | #include <nvgpu/hw/gk20a/hw_ltc_gk20a.h> |
61 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> | 58 | #include <nvgpu/hw/gk20a/hw_fb_gk20a.h> |
@@ -4489,12 +4486,8 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) | |||
4489 | 4486 | ||
4490 | gr_gk20a_zcull_init_hw(g, gr); | 4487 | gr_gk20a_zcull_init_hw(g, gr); |
4491 | 4488 | ||
4492 | /* Bug 1340570: increase the clock timeout to avoid potential | 4489 | if (g->ops.bus.set_ppriv_timeout_settings) |
4493 | * operation failure at high gpcclk rate. Default values are 0x400. | 4490 | g->ops.bus.set_ppriv_timeout_settings(g); |
4494 | */ | ||
4495 | gk20a_writel(g, pri_ringstation_sys_master_config_r(0x15), 0x800); | ||
4496 | gk20a_writel(g, pri_ringstation_gpc_master_config_r(0xa), 0x800); | ||
4497 | gk20a_writel(g, pri_ringstation_fbp_master_config_r(0x8), 0x800); | ||
4498 | 4491 | ||
4499 | /* enable fifo access */ | 4492 | /* enable fifo access */ |
4500 | gk20a_writel(g, gr_gpfifo_ctl_r(), | 4493 | gk20a_writel(g, gr_gpfifo_ctl_r(), |