summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.c10
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.h8
2 files changed, 7 insertions, 11 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index 1d594d29..ab3d86be 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -468,16 +468,6 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
468 if (g->ops.clk.get_maxrate) 468 if (g->ops.clk.get_maxrate)
469 gpu->max_freq = g->ops.clk.get_maxrate(&g->clk); 469 gpu->max_freq = g->ops.clk.get_maxrate(&g->clk);
470 470
471 g->ops.gr.get_preemption_mode_flags(g, &g->gr.preemption_mode_rec);
472 gpu->graphics_preemption_mode_flags =
473 g->gr.preemption_mode_rec.graphics_preemption_mode_flags;
474 gpu->compute_preemption_mode_flags =
475 g->gr.preemption_mode_rec.compute_preemption_mode_flags;
476 gpu->default_graphics_preempt_mode =
477 g->gr.preemption_mode_rec.default_graphics_preempt_mode;
478 gpu->default_compute_preempt_mode =
479 g->gr.preemption_mode_rec.default_compute_preempt_mode;
480
481 gpu->local_video_memory_size = g->mm.vidmem.size; 471 gpu->local_video_memory_size = g->mm.vidmem.size;
482 472
483 gpu->pci_vendor_id = g->pci_vendor_id; 473 gpu->pci_vendor_id = g->pci_vendor_id;
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index b437838f..3377df5d 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -61,6 +61,13 @@
61 (PAGE_SIZE/(PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY * sizeof(u32))) 61 (PAGE_SIZE/(PATCH_CTX_SLOTS_REQUIRED_PER_ENTRY * sizeof(u32)))
62#define PATCH_CTX_ENTRIES_FROM_SIZE(size) (size/sizeof(u32)) 62#define PATCH_CTX_ENTRIES_FROM_SIZE(size) (size/sizeof(u32))
63 63
64#define NVGPU_PREEMPTION_MODE_GRAPHICS_WFI (1 << 0)
65#define NVGPU_PREEMPTION_MODE_GRAPHICS_GFXP (1 << 1)
66
67#define NVGPU_PREEMPTION_MODE_COMPUTE_WFI (1 << 0)
68#define NVGPU_PREEMPTION_MODE_COMPUTE_CTA (1 << 1)
69#define NVGPU_PREEMPTION_MODE_COMPUTE_CILP (1 << 2)
70
64struct channel_gk20a; 71struct channel_gk20a;
65struct nvgpu_warpstate; 72struct nvgpu_warpstate;
66 73
@@ -403,7 +410,6 @@ struct gr_gk20a {
403 bool sw_ready; 410 bool sw_ready;
404 bool skip_ucode_init; 411 bool skip_ucode_init;
405 412
406 struct nvgpu_preemption_modes_rec preemption_mode_rec;
407#ifdef CONFIG_ARCH_TEGRA_18x_SOC 413#ifdef CONFIG_ARCH_TEGRA_18x_SOC
408 struct gr_t18x t18x; 414 struct gr_t18x t18x;
409#endif 415#endif