diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 6 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 |
3 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 45501d4f..5e5bbcb0 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -2539,8 +2539,7 @@ unsigned int gk20a_channel_poll(struct file *filep, poll_table *wait) | |||
2539 | return mask; | 2539 | return mask; |
2540 | } | 2540 | } |
2541 | 2541 | ||
2542 | static int gk20a_channel_set_priority(struct channel_gk20a *ch, | 2542 | int gk20a_channel_set_priority(struct channel_gk20a *ch, u32 priority) |
2543 | u32 priority) | ||
2544 | { | 2543 | { |
2545 | u32 timeslice_timeout; | 2544 | u32 timeslice_timeout; |
2546 | bool interleave = false; | 2545 | bool interleave = false; |
@@ -2723,6 +2722,7 @@ void gk20a_init_channel(struct gpu_ops *gops) | |||
2723 | gops->fifo.alloc_inst = channel_gk20a_alloc_inst; | 2722 | gops->fifo.alloc_inst = channel_gk20a_alloc_inst; |
2724 | gops->fifo.free_inst = channel_gk20a_free_inst; | 2723 | gops->fifo.free_inst = channel_gk20a_free_inst; |
2725 | gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc; | 2724 | gops->fifo.setup_ramfc = channel_gk20a_setup_ramfc; |
2725 | gops->fifo.channel_set_priority = gk20a_channel_set_priority; | ||
2726 | } | 2726 | } |
2727 | 2727 | ||
2728 | long gk20a_channel_ioctl(struct file *filp, | 2728 | long gk20a_channel_ioctl(struct file *filp, |
@@ -2897,7 +2897,7 @@ long gk20a_channel_ioctl(struct file *filp, | |||
2897 | __func__, cmd); | 2897 | __func__, cmd); |
2898 | break; | 2898 | break; |
2899 | } | 2899 | } |
2900 | err = gk20a_channel_set_priority(ch, | 2900 | err = ch->g->ops.fifo.channel_set_priority(ch, |
2901 | ((struct nvgpu_set_priority_args *)buf)->priority); | 2901 | ((struct nvgpu_set_priority_args *)buf)->priority); |
2902 | gk20a_idle(dev); | 2902 | gk20a_idle(dev); |
2903 | break; | 2903 | break; |
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h index 24a2fe11..0f796ffe 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h | |||
@@ -268,5 +268,6 @@ void gk20a_channel_timeout_restart_all_channels(struct gk20a *g); | |||
268 | int gk20a_channel_get_timescale_from_timeslice(struct gk20a *g, | 268 | int gk20a_channel_get_timescale_from_timeslice(struct gk20a *g, |
269 | int timeslice_period, | 269 | int timeslice_period, |
270 | int *__timeslice_timeout, int *__timeslice_scale); | 270 | int *__timeslice_timeout, int *__timeslice_scale); |
271 | int gk20a_channel_set_priority(struct channel_gk20a *ch, u32 priority); | ||
271 | 272 | ||
272 | #endif /* CHANNEL_GK20A_H */ | 273 | #endif /* CHANNEL_GK20A_H */ |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 2b4c3237..a58a1eed 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -260,6 +260,7 @@ struct gpu_ops { | |||
260 | int (*wait_engine_idle)(struct gk20a *g); | 260 | int (*wait_engine_idle)(struct gk20a *g); |
261 | u32 (*get_num_fifos)(struct gk20a *g); | 261 | u32 (*get_num_fifos)(struct gk20a *g); |
262 | u32 (*get_pbdma_signature)(struct gk20a *g); | 262 | u32 (*get_pbdma_signature)(struct gk20a *g); |
263 | int (*channel_set_priority)(struct channel_gk20a *ch, u32 priority); | ||
263 | } fifo; | 264 | } fifo; |
264 | struct pmu_v { | 265 | struct pmu_v { |
265 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ | 266 | /*used for change of enum zbc update cmd id from ver 0 to ver1*/ |