2 files changed, 1 insertions, 61 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
index 03728378..a9457330 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c
@@ -220,7 +220,7 @@ static void set_pmu_cmdline_args_falctracedmabase_v5(struct nvgpu_pmu *pmu)
 {
         struct gk20a *g = gk20a_from_pmu(pmu);
 
-        gk20a_pmu_surface_describe(g, &pmu->trace_buf, &pmu->args_v5.trace_buf);
+        nvgpu_pmu_surface_describe(g, &pmu->trace_buf, &pmu->args_v5.trace_buf);
 }
 
 static void set_pmu_cmdline_args_falctracedmaidx_v5(
@@ -3789,53 +3789,6 @@ void gk20a_pmu_isr(struct gk20a *g)
         nvgpu_mutex_release(&pmu->isr_mutex);
 }
 
-void gk20a_pmu_surface_describe(struct gk20a *g, struct nvgpu_mem *mem,
-                struct flcn_mem_desc_v0 *fb)
-{
-        fb->address.lo = u64_lo32(mem->gpu_va);
-        fb->address.hi = u64_hi32(mem->gpu_va);
-        fb->params = ((u32)mem->size & 0xFFFFFF);
-        fb->params |= (GK20A_PMU_DMAIDX_VIRT << 24);
-}
-
-int gk20a_pmu_vidmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem,
-                u32 size)
-{
-        struct mm_gk20a *mm = &g->mm;
-        struct vm_gk20a *vm = mm->pmu.vm;
-        int err;
-
-        err = nvgpu_dma_alloc_map_vid(vm, size, mem);
-        if (err) {
-                nvgpu_err(g, "memory allocation failed");
-                return -ENOMEM;
-        }
-
-        return 0;
-}
-
-int gk20a_pmu_sysmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem,
-                u32 size)
-{
-        struct mm_gk20a *mm = &g->mm;
-        struct vm_gk20a *vm = mm->pmu.vm;
-        int err;
-
-        err = nvgpu_dma_alloc_map_sys(vm, size, mem);
-        if (err) {
-                nvgpu_err(g, "failed to allocate memory");
-                return -ENOMEM;
-        }
-
-        return 0;
-}
-
-void gk20a_pmu_surface_free(struct gk20a *g, struct nvgpu_mem *mem)
-{
-        nvgpu_dma_free(g, mem);
-        memset(mem, 0, sizeof(struct nvgpu_mem));
-}
-
 int gk20a_pmu_pg_global_enable(struct gk20a *g, u32 enable_pg)
 {
         u32 status = 0;
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index 1c29b380..1d2e20e6 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -57,12 +57,6 @@ struct nvgpu_firmware;
 #define PMU_PGENG_GR_BUFFER_IDX_ZBC     (1)
 #define PMU_PGENG_GR_BUFFER_IDX_FECS    (2)
 
-struct pmu_surface {
-        struct nvgpu_mem vidmem_desc;
-        struct nvgpu_mem sysmem_desc;
-        struct flcn_mem_desc_v0 params;
-};
-
 #define PMU_PG_IDLE_THRESHOLD_SIM               1000
 #define PMU_PG_POST_POWERUP_IDLE_THRESHOLD_SIM  4000000
 /* TBD: QT or else ? */
@@ -154,13 +148,6 @@ int gk20a_pmu_reset(struct gk20a *g);
 int pmu_idle(struct nvgpu_pmu *pmu);
 int pmu_enable_hw(struct nvgpu_pmu *pmu, bool enable);
 
-void gk20a_pmu_surface_free(struct gk20a *g, struct nvgpu_mem *mem);
-void gk20a_pmu_surface_describe(struct gk20a *g, struct nvgpu_mem *mem,
-                struct flcn_mem_desc_v0 *fb);
-int gk20a_pmu_vidmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem,
-                u32 size);
-int gk20a_pmu_sysmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem,
-                u32 size);
 bool nvgpu_find_hex_in_string(char *strings, struct gk20a *g, u32 *hex_pos);
 
 int nvgpu_pmu_perfmon_start_sampling(struct nvgpu_pmu *pmu);