diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 19 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h | 5 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | 32 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hal_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 13 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 7 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c | 4 |
12 files changed, 118 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index fb15b3da..5464b88a 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
@@ -582,6 +582,8 @@ static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, | |||
582 | false); | 582 | false); |
583 | g->ops.clock_gating.slcg_perf_load_gating_prod(g, | 583 | g->ops.clock_gating.slcg_perf_load_gating_prod(g, |
584 | false); | 584 | false); |
585 | g->ops.clock_gating.slcg_ltc_load_gating_prod(g, | ||
586 | false); | ||
585 | gr_gk20a_init_blcg_mode(g, BLCG_RUN, ENGINE_GR_GK20A); | 587 | gr_gk20a_init_blcg_mode(g, BLCG_RUN, ENGINE_GR_GK20A); |
586 | 588 | ||
587 | g->elcg_enabled = false; | 589 | g->elcg_enabled = false; |
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index e6b3fd5f..230e1722 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -385,6 +385,16 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g) | |||
385 | gk20a_reset(g, mc_enable_pfifo_enabled_f() | 385 | gk20a_reset(g, mc_enable_pfifo_enabled_f() |
386 | | mc_enable_ce2_enabled_f()); | 386 | | mc_enable_ce2_enabled_f()); |
387 | 387 | ||
388 | if (g->ops.clock_gating.slcg_ce2_load_gating_prod) | ||
389 | g->ops.clock_gating.slcg_ce2_load_gating_prod(g, | ||
390 | g->slcg_enabled); | ||
391 | if (g->ops.clock_gating.slcg_fifo_load_gating_prod) | ||
392 | g->ops.clock_gating.slcg_fifo_load_gating_prod(g, | ||
393 | g->slcg_enabled); | ||
394 | if (g->ops.clock_gating.blcg_fifo_load_gating_prod) | ||
395 | g->ops.clock_gating.blcg_fifo_load_gating_prod(g, | ||
396 | g->blcg_enabled); | ||
397 | |||
388 | /* enable pbdma */ | 398 | /* enable pbdma */ |
389 | mask = 0; | 399 | mask = 0; |
390 | for (i = 0; i < proj_host_num_pbdma_v(); ++i) | 400 | for (i = 0; i < proj_host_num_pbdma_v(); ++i) |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c index a6a51de5..0caef967 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a.c | |||
@@ -907,6 +907,13 @@ static int gk20a_pm_finalize_poweron(struct device *dev) | |||
907 | gk20a_writel(g, mc_intr_en_0_r(), | 907 | gk20a_writel(g, mc_intr_en_0_r(), |
908 | mc_intr_en_0_inta_hardware_f()); | 908 | mc_intr_en_0_inta_hardware_f()); |
909 | 909 | ||
910 | if (g->ops.clock_gating.slcg_bus_load_gating_prod) | ||
911 | g->ops.clock_gating.slcg_bus_load_gating_prod(g, | ||
912 | g->slcg_enabled); | ||
913 | if (g->ops.clock_gating.blcg_bus_load_gating_prod) | ||
914 | g->ops.clock_gating.blcg_bus_load_gating_prod(g, | ||
915 | g->blcg_enabled); | ||
916 | |||
910 | if (!tegra_platform_is_silicon()) | 917 | if (!tegra_platform_is_silicon()) |
911 | gk20a_writel(g, bus_intr_en_0_r(), 0x0); | 918 | gk20a_writel(g, bus_intr_en_0_r(), 0x0); |
912 | else | 919 | else |
@@ -914,6 +921,7 @@ static int gk20a_pm_finalize_poweron(struct device *dev) | |||
914 | bus_intr_en_0_pri_squash_m() | | 921 | bus_intr_en_0_pri_squash_m() | |
915 | bus_intr_en_0_pri_fecserr_m() | | 922 | bus_intr_en_0_pri_fecserr_m() | |
916 | bus_intr_en_0_pri_timeout_m()); | 923 | bus_intr_en_0_pri_timeout_m()); |
924 | |||
917 | gk20a_reset_priv_ring(g); | 925 | gk20a_reset_priv_ring(g); |
918 | 926 | ||
919 | gk20a_detect_chip(g); | 927 | gk20a_detect_chip(g); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index fc97fcb9..b6d73343 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -150,11 +150,28 @@ struct gpu_ops { | |||
150 | void (*init_kind_attr)(struct gk20a *g); | 150 | void (*init_kind_attr)(struct gk20a *g); |
151 | } fb; | 151 | } fb; |
152 | struct { | 152 | struct { |
153 | void (*slcg_bus_load_gating_prod)(struct gk20a *g, bool prod); | ||
154 | void (*slcg_ce2_load_gating_prod)(struct gk20a *g, bool prod); | ||
155 | void (*slcg_chiplet_load_gating_prod)(struct gk20a *g, bool prod); | ||
156 | void (*slcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod); | ||
157 | void (*slcg_fb_load_gating_prod)(struct gk20a *g, bool prod); | ||
158 | void (*slcg_fifo_load_gating_prod)(struct gk20a *g, bool prod); | ||
153 | void (*slcg_gr_load_gating_prod)(struct gk20a *g, bool prod); | 159 | void (*slcg_gr_load_gating_prod)(struct gk20a *g, bool prod); |
160 | void (*slcg_ltc_load_gating_prod)(struct gk20a *g, bool prod); | ||
154 | void (*slcg_perf_load_gating_prod)(struct gk20a *g, bool prod); | 161 | void (*slcg_perf_load_gating_prod)(struct gk20a *g, bool prod); |
162 | void (*slcg_priring_load_gating_prod)(struct gk20a *g, bool prod); | ||
163 | void (*slcg_pmu_load_gating_prod)(struct gk20a *g, bool prod); | ||
164 | void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod); | ||
165 | void (*slcg_xbar_load_gating_prod)(struct gk20a *g, bool prod); | ||
166 | void (*blcg_bus_load_gating_prod)(struct gk20a *g, bool prod); | ||
167 | void (*blcg_ctxsw_firmware_load_gating_prod)(struct gk20a *g, bool prod); | ||
168 | void (*blcg_fb_load_gating_prod)(struct gk20a *g, bool prod); | ||
169 | void (*blcg_fifo_load_gating_prod)(struct gk20a *g, bool prod); | ||
155 | void (*blcg_gr_load_gating_prod)(struct gk20a *g, bool prod); | 170 | void (*blcg_gr_load_gating_prod)(struct gk20a *g, bool prod); |
171 | void (*blcg_ltc_load_gating_prod)(struct gk20a *g, bool prod); | ||
172 | void (*blcg_pwr_csb_load_gating_prod)(struct gk20a *g, bool prod); | ||
173 | void (*blcg_pmu_load_gating_prod)(struct gk20a *g, bool prod); | ||
156 | void (*pg_gr_load_gating_prod)(struct gk20a *g, bool prod); | 174 | void (*pg_gr_load_gating_prod)(struct gk20a *g, bool prod); |
157 | void (*slcg_therm_load_gating_prod)(struct gk20a *g, bool prod); | ||
158 | } clock_gating; | 175 | } clock_gating; |
159 | struct { | 176 | struct { |
160 | void (*bind_channel)(struct channel_gk20a *ch_gk20a); | 177 | void (*bind_channel)(struct channel_gk20a *ch_gk20a); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c index c6478a5e..0e3b0cb3 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c | |||
@@ -311,6 +311,11 @@ void gr_gk20a_slcg_gr_load_gating_prod(struct gk20a *g, | |||
311 | } | 311 | } |
312 | } | 312 | } |
313 | 313 | ||
314 | void ltc_gk20a_slcg_ltc_load_gating_prod(struct gk20a *g, | ||
315 | bool prod) | ||
316 | { | ||
317 | } | ||
318 | |||
314 | void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g, | 319 | void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g, |
315 | bool prod) | 320 | bool prod) |
316 | { | 321 | { |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h index 40a6c545..b2a02984 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/video/tegra/host/gk20a/gk20a_gating_reglist.h | 2 | * drivers/video/tegra/host/gk20a/gk20a_gating_reglist.h |
3 | * | 3 | * |
4 | * Copyright (c) 2012, NVIDIA Corporation. | 4 | * Copyright (c) 2012-2014, NVIDIA Corporation. All rights reserved. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -27,6 +27,9 @@ void gr_gk20a_slcg_gr_load_gating_prod(struct gk20a *g, | |||
27 | void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g, | 27 | void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g, |
28 | bool prod); | 28 | bool prod); |
29 | 29 | ||
30 | void ltc_gk20a_slcg_ltc_load_gating_prod(struct gk20a *g, | ||
31 | bool prod); | ||
32 | |||
30 | void gr_gk20a_blcg_gr_load_gating_prod(struct gk20a *g, | 33 | void gr_gk20a_blcg_gr_load_gating_prod(struct gk20a *g, |
31 | bool prod); | 34 | bool prod); |
32 | 35 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c index fceed5e9..687147ed 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_sysfs.c | |||
@@ -94,7 +94,19 @@ static ssize_t blcg_enable_store(struct device *device, | |||
94 | g->blcg_enabled = false; | 94 | g->blcg_enabled = false; |
95 | 95 | ||
96 | gk20a_busy(g->dev); | 96 | gk20a_busy(g->dev); |
97 | if (g->ops.clock_gating.blcg_bus_load_gating_prod) | ||
98 | g->ops.clock_gating.blcg_bus_load_gating_prod(g, g->blcg_enabled); | ||
99 | if (g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod) | ||
100 | g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod(g, g->blcg_enabled); | ||
101 | if (g->ops.clock_gating.blcg_fb_load_gating_prod) | ||
102 | g->ops.clock_gating.blcg_fb_load_gating_prod(g, g->blcg_enabled); | ||
103 | if (g->ops.clock_gating.blcg_fifo_load_gating_prod) | ||
104 | g->ops.clock_gating.blcg_fifo_load_gating_prod(g, g->blcg_enabled); | ||
97 | g->ops.clock_gating.blcg_gr_load_gating_prod(g, g->blcg_enabled); | 105 | g->ops.clock_gating.blcg_gr_load_gating_prod(g, g->blcg_enabled); |
106 | if (g->ops.clock_gating.blcg_ltc_load_gating_prod) | ||
107 | g->ops.clock_gating.blcg_ltc_load_gating_prod(g, g->blcg_enabled); | ||
108 | if (g->ops.clock_gating.blcg_pmu_load_gating_prod) | ||
109 | g->ops.clock_gating.blcg_pmu_load_gating_prod(g, g->blcg_enabled); | ||
98 | gk20a_idle(g->dev); | 110 | gk20a_idle(g->dev); |
99 | 111 | ||
100 | dev_info(device, "BLCG is %s.\n", g->blcg_enabled ? "enabled" : | 112 | dev_info(device, "BLCG is %s.\n", g->blcg_enabled ? "enabled" : |
@@ -136,8 +148,28 @@ static ssize_t slcg_enable_store(struct device *device, | |||
136 | * it is added to init, we should add it here too. | 148 | * it is added to init, we should add it here too. |
137 | */ | 149 | */ |
138 | gk20a_busy(g->dev); | 150 | gk20a_busy(g->dev); |
151 | if (g->ops.clock_gating.slcg_bus_load_gating_prod) | ||
152 | g->ops.clock_gating.slcg_bus_load_gating_prod(g, g->slcg_enabled); | ||
153 | if (g->ops.clock_gating.slcg_ce2_load_gating_prod) | ||
154 | g->ops.clock_gating.slcg_ce2_load_gating_prod(g, g->slcg_enabled); | ||
155 | if (g->ops.clock_gating.slcg_chiplet_load_gating_prod) | ||
156 | g->ops.clock_gating.slcg_chiplet_load_gating_prod(g, g->slcg_enabled); | ||
157 | if (g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod) | ||
158 | g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod(g, g->slcg_enabled); | ||
159 | if (g->ops.clock_gating.slcg_fb_load_gating_prod) | ||
160 | g->ops.clock_gating.slcg_fb_load_gating_prod(g, g->slcg_enabled); | ||
161 | if (g->ops.clock_gating.slcg_fifo_load_gating_prod) | ||
162 | g->ops.clock_gating.slcg_fifo_load_gating_prod(g, g->slcg_enabled); | ||
139 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, g->slcg_enabled); | 163 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, g->slcg_enabled); |
164 | if (g->ops.clock_gating.slcg_ltc_load_gating_prod) | ||
165 | g->ops.clock_gating.slcg_ltc_load_gating_prod(g, g->slcg_enabled); | ||
140 | g->ops.clock_gating.slcg_perf_load_gating_prod(g, g->slcg_enabled); | 166 | g->ops.clock_gating.slcg_perf_load_gating_prod(g, g->slcg_enabled); |
167 | if (g->ops.clock_gating.slcg_priring_load_gating_prod) | ||
168 | g->ops.clock_gating.slcg_priring_load_gating_prod(g, g->slcg_enabled); | ||
169 | if (g->ops.clock_gating.slcg_pmu_load_gating_prod) | ||
170 | g->ops.clock_gating.slcg_pmu_load_gating_prod(g, g->slcg_enabled); | ||
171 | if (g->ops.clock_gating.slcg_xbar_load_gating_prod) | ||
172 | g->ops.clock_gating.slcg_xbar_load_gating_prod(g, g->slcg_enabled); | ||
141 | gk20a_idle(g->dev); | 173 | gk20a_idle(g->dev); |
142 | 174 | ||
143 | dev_info(device, "SLCG is %s.\n", g->slcg_enabled ? "enabled" : | 175 | dev_info(device, "SLCG is %s.\n", g->slcg_enabled ? "enabled" : |
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index cbad1292..661a2ca3 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -4246,10 +4246,6 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) | |||
4246 | if (g->ops.gr.init_gpc_mmu) | 4246 | if (g->ops.gr.init_gpc_mmu) |
4247 | g->ops.gr.init_gpc_mmu(g); | 4247 | g->ops.gr.init_gpc_mmu(g); |
4248 | 4248 | ||
4249 | /* slcg prod values */ | ||
4250 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, g->slcg_enabled); | ||
4251 | g->ops.clock_gating.slcg_perf_load_gating_prod(g, g->slcg_enabled); | ||
4252 | |||
4253 | /* init mmu debug buffer */ | 4249 | /* init mmu debug buffer */ |
4254 | addr = NV_MC_SMMU_VADDR_TRANSLATE(gr->mmu_wr_mem.iova); | 4250 | addr = NV_MC_SMMU_VADDR_TRANSLATE(gr->mmu_wr_mem.iova); |
4255 | addr_lo = u64_lo32(addr); | 4251 | addr_lo = u64_lo32(addr); |
@@ -4281,9 +4277,6 @@ static int gk20a_init_gr_setup_hw(struct gk20a *g) | |||
4281 | 4277 | ||
4282 | gr_gk20a_zcull_init_hw(g, gr); | 4278 | gr_gk20a_zcull_init_hw(g, gr); |
4283 | 4279 | ||
4284 | g->ops.clock_gating.blcg_gr_load_gating_prod(g, g->blcg_enabled); | ||
4285 | g->ops.clock_gating.pg_gr_load_gating_prod(g, true); | ||
4286 | |||
4287 | if (g->elcg_enabled) { | 4280 | if (g->elcg_enabled) { |
4288 | gr_gk20a_init_elcg_mode(g, ELCG_AUTO, ENGINE_GR_GK20A); | 4281 | gr_gk20a_init_elcg_mode(g, ELCG_AUTO, ENGINE_GR_GK20A); |
4289 | gr_gk20a_init_elcg_mode(g, ELCG_AUTO, ENGINE_CE2_GK20A); | 4282 | gr_gk20a_init_elcg_mode(g, ELCG_AUTO, ENGINE_CE2_GK20A); |
@@ -4426,6 +4419,19 @@ static int gk20a_init_gr_prepare(struct gk20a *g) | |||
4426 | | mc_enable_blg_enabled_f() | 4419 | | mc_enable_blg_enabled_f() |
4427 | | mc_enable_perfmon_enabled_f()); | 4420 | | mc_enable_perfmon_enabled_f()); |
4428 | 4421 | ||
4422 | /* slcg prod values */ | ||
4423 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, g->slcg_enabled); | ||
4424 | if (g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod) | ||
4425 | g->ops.clock_gating.slcg_ctxsw_firmware_load_gating_prod(g, | ||
4426 | g->slcg_enabled); | ||
4427 | g->ops.clock_gating.slcg_perf_load_gating_prod(g, g->slcg_enabled); | ||
4428 | |||
4429 | g->ops.clock_gating.blcg_gr_load_gating_prod(g, g->blcg_enabled); | ||
4430 | if (g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod) | ||
4431 | g->ops.clock_gating.blcg_ctxsw_firmware_load_gating_prod(g, | ||
4432 | g->blcg_enabled); | ||
4433 | g->ops.clock_gating.pg_gr_load_gating_prod(g, true); | ||
4434 | |||
4429 | /* enable fifo access */ | 4435 | /* enable fifo access */ |
4430 | gk20a_writel(g, gr_gpfifo_ctl_r(), | 4436 | gk20a_writel(g, gr_gpfifo_ctl_r(), |
4431 | gr_gpfifo_ctl_access_enabled_f() | | 4437 | gr_gpfifo_ctl_access_enabled_f() | |
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c index 218491ea..578b77bf 100644 --- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c | |||
@@ -33,6 +33,8 @@ struct gpu_ops gk20a_ops = { | |||
33 | gr_gk20a_slcg_gr_load_gating_prod, | 33 | gr_gk20a_slcg_gr_load_gating_prod, |
34 | .slcg_perf_load_gating_prod = | 34 | .slcg_perf_load_gating_prod = |
35 | gr_gk20a_slcg_perf_load_gating_prod, | 35 | gr_gk20a_slcg_perf_load_gating_prod, |
36 | .slcg_ltc_load_gating_prod = | ||
37 | ltc_gk20a_slcg_ltc_load_gating_prod, | ||
36 | .blcg_gr_load_gating_prod = | 38 | .blcg_gr_load_gating_prod = |
37 | gr_gk20a_blcg_gr_load_gating_prod, | 39 | gr_gk20a_blcg_gr_load_gating_prod, |
38 | .pg_gr_load_gating_prod = | 40 | .pg_gr_load_gating_prod = |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 3feb675b..173776ff 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -251,6 +251,19 @@ static int gk20a_init_mm_reset_enable_hw(struct gk20a *g) | |||
251 | if (g->ops.fb.reset) | 251 | if (g->ops.fb.reset) |
252 | g->ops.fb.reset(g); | 252 | g->ops.fb.reset(g); |
253 | 253 | ||
254 | if (g->ops.clock_gating.slcg_fb_load_gating_prod) | ||
255 | g->ops.clock_gating.slcg_fb_load_gating_prod(g, | ||
256 | g->slcg_enabled); | ||
257 | if (g->ops.clock_gating.slcg_ltc_load_gating_prod) | ||
258 | g->ops.clock_gating.slcg_ltc_load_gating_prod(g, | ||
259 | g->slcg_enabled); | ||
260 | if (g->ops.clock_gating.blcg_fb_load_gating_prod) | ||
261 | g->ops.clock_gating.blcg_fb_load_gating_prod(g, | ||
262 | g->blcg_enabled); | ||
263 | if (g->ops.clock_gating.blcg_ltc_load_gating_prod) | ||
264 | g->ops.clock_gating.blcg_ltc_load_gating_prod(g, | ||
265 | g->blcg_enabled); | ||
266 | |||
254 | if (g->ops.fb.init_fs_state) | 267 | if (g->ops.fb.init_fs_state) |
255 | g->ops.fb.init_fs_state(g); | 268 | g->ops.fb.init_fs_state(g); |
256 | 269 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index eb62caaf..f77ad10b 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -1124,6 +1124,13 @@ static int pmu_enable_hw(struct pmu_gk20a *pmu, bool enable) | |||
1124 | int retries = GR_IDLE_CHECK_MAX / GR_IDLE_CHECK_DEFAULT; | 1124 | int retries = GR_IDLE_CHECK_MAX / GR_IDLE_CHECK_DEFAULT; |
1125 | gk20a_enable(g, mc_enable_pwr_enabled_f()); | 1125 | gk20a_enable(g, mc_enable_pwr_enabled_f()); |
1126 | 1126 | ||
1127 | if (g->ops.clock_gating.slcg_pmu_load_gating_prod) | ||
1128 | g->ops.clock_gating.slcg_pmu_load_gating_prod(g, | ||
1129 | g->slcg_enabled); | ||
1130 | if (g->ops.clock_gating.blcg_pmu_load_gating_prod) | ||
1131 | g->ops.clock_gating.blcg_pmu_load_gating_prod(g, | ||
1132 | g->blcg_enabled); | ||
1133 | |||
1127 | do { | 1134 | do { |
1128 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & | 1135 | u32 w = gk20a_readl(g, pwr_falcon_dmactl_r()) & |
1129 | (pwr_falcon_dmactl_dmem_scrubbing_m() | | 1136 | (pwr_falcon_dmactl_dmem_scrubbing_m() | |
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c index aea1a80b..9d82a986 100644 --- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c | |||
@@ -39,6 +39,10 @@ void gk20a_reset_priv_ring(struct gk20a *g) | |||
39 | 39 | ||
40 | gk20a_reset(g, mc_enable_priv_ring_enabled_f()); | 40 | gk20a_reset(g, mc_enable_priv_ring_enabled_f()); |
41 | 41 | ||
42 | if (g->ops.clock_gating.slcg_priring_load_gating_prod) | ||
43 | g->ops.clock_gating.slcg_priring_load_gating_prod(g, | ||
44 | g->slcg_enabled); | ||
45 | |||
42 | gk20a_writel(g,pri_ringmaster_command_r(), | 46 | gk20a_writel(g,pri_ringmaster_command_r(), |
43 | 0x4); | 47 | 0x4); |
44 | 48 | ||