2 files changed, 7 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 081ec077..f16be5a1 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -84,6 +84,7 @@ struct gpu_ops {
                 void (*init_fs_state)(struct gk20a *g);
                 void (*elpg_flush)(struct gk20a *g);
                 void (*isr)(struct gk20a *g);
+                u32 (*cbc_fix_config)(struct gk20a *g, int base);
         } ltc;
         struct {
                 int (*init_fs_state)(struct gk20a *g);
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_common.c b/drivers/gpu/nvgpu/gk20a/ltc_common.c
index 72477983..75530b25 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_common.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_common.c
@@ -291,7 +291,7 @@ static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr)
         compbit_base_post_divide64 = compbit_store_base_iova >>
                 ltc_ltcs_ltss_cbc_base_alignment_shift_v();
 
-        do_div(compbit_base_post_divide64, gr->num_fbps);
+        do_div(compbit_base_post_divide64, g->ltc_count);
         compbit_base_post_divide = u64_lo32(compbit_base_post_divide64);
 
         compbit_base_post_multiply64 = ((u64)compbit_base_post_divide *
@@ -300,6 +300,11 @@ static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr)
         if (compbit_base_post_multiply64 < compbit_store_base_iova)
                 compbit_base_post_divide++;
 
+        /* Bug 1477079 indicates sw adjustment on the posted divided base. */
+        if (g->ops.ltc.cbc_fix_config)
+                compbit_base_post_divide =
+                        g->ops.ltc.cbc_fix_config(g, compbit_base_post_divide);
+
         gk20a_writel(g, ltc_ltcs_ltss_cbc_base_r(),
                 compbit_base_post_divide);