3 files changed, 12 insertions, 19 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index a34f06b2..65c3b56f 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -225,7 +225,7 @@ struct gpu_ops {
                 void (*set_gpc_tpc_mask)(struct gk20a *g, u32 gpc_index);
                 void (*free_channel_ctx)(struct channel_gk20a *c, bool is_tsg);
                 int (*alloc_obj_ctx)(struct channel_gk20a  *c,
-                                struct nvgpu_alloc_obj_ctx_args *args);
+                                     u32 class_num, u32 flags);
                 int (*bind_ctxsw_zcull)(struct gk20a *g, struct gr_gk20a *gr,
                                 struct channel_gk20a *c, u64 zcull_va,
                                 u32 mode);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index f78d862c..ef7136fe 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -2890,8 +2890,7 @@ void gk20a_free_channel_ctx(struct channel_gk20a *c, bool is_tsg)
         c->first_init = false;
 }
 
-int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
-                        struct nvgpu_alloc_obj_ctx_args *args)
+int gk20a_alloc_obj_ctx(struct channel_gk20a  *c, u32 class_num, u32 flags)
 {
         struct gk20a *g = c->g;
         struct fifo_gk20a *f = &g->fifo;
@@ -2909,13 +2908,13 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
                 return -EINVAL;
         }
 
-        if (!g->ops.gr.is_valid_class(g, args->class_num)) {
+        if (!g->ops.gr.is_valid_class(g, class_num)) {
                 nvgpu_err(g,
-                           "invalid obj class 0x%x", args->class_num);
+                           "invalid obj class 0x%x", class_num);
                 err = -EINVAL;
                 goto out;
         }
-        c->obj_class = args->class_num;
+        c->obj_class = class_num;
 
         if (gk20a_is_channel_marked_as_tsg(c))
                 tsg = &f->tsg[c->tsgid];
@@ -2924,8 +2923,8 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
         if (!tsg) {
                 if (!ch_ctx->gr_ctx) {
                         err = gr_gk20a_alloc_channel_gr_ctx(g, c,
-                                                            args->class_num,
-                                                            args->flags);
+                                                            class_num,
+                                                            flags);
                         if (err) {
                                 nvgpu_err(g,
                                         "fail to allocate gr ctx buffer");
@@ -2945,8 +2944,8 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
                         tsg->vm = c->vm;
                         nvgpu_vm_get(tsg->vm);
                         err = gr_gk20a_alloc_tsg_gr_ctx(g, tsg,
-                                                        args->class_num,
-                                                        args->flags);
+                                                        class_num,
+                                                        flags);
                         if (err) {
                                 nvgpu_err(g,
                                         "fail to allocate TSG gr ctx buffer");
@@ -2993,7 +2992,7 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
         }
 
         /* tweak any perf parameters per-context here */
-        if (args->class_num == KEPLER_COMPUTE_A) {
+        if (class_num == KEPLER_COMPUTE_A) {
                 u32 tex_lock_disable_mask;
                 u32 texlock;
                 u32 lockboost_mask;
@@ -3047,7 +3046,7 @@ int gk20a_alloc_obj_ctx(struct channel_gk20a  *c,
                                    "failed to set texlock for compute class");
                 }
 
-                args->flags |= NVGPU_ALLOC_OBJ_FLAGS_LOCKBOOST_ZERO;
+                flags |= NVGPU_ALLOC_OBJ_FLAGS_LOCKBOOST_ZERO;
 
                 if (g->support_pmu && g->can_elpg)
                         nvgpu_pmu_enable_elpg(g);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
index db1a9514..8a044728 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.h
@@ -522,13 +522,7 @@ int gk20a_init_gr_channel(struct channel_gk20a *ch_gk20a);
 
 int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr);
 
-struct nvgpu_alloc_obj_ctx_args;
-struct nvgpu_free_obj_ctx_args;
-
-int gk20a_alloc_obj_ctx(struct channel_gk20a *c,
-                        struct nvgpu_alloc_obj_ctx_args *args);
-int gk20a_free_obj_ctx(struct channel_gk20a *c,
-                        struct nvgpu_free_obj_ctx_args *args);
+int gk20a_alloc_obj_ctx(struct channel_gk20a  *c, u32 class_num, u32 flags);
 void gk20a_free_channel_ctx(struct channel_gk20a *c, bool is_tsg);
 
 int gk20a_gr_isr(struct gk20a *g);