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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c8
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h6
-rw-r--r--drivers/gpu/nvgpu/gk20a/gr_gk20a.c2
-rw-r--r--drivers/gpu/nvgpu/gk20a/mm_gk20a.h1
4 files changed, 13 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
index 321cebb2..309fe75a 100644
--- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
@@ -891,8 +891,8 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
891 goto clean_up; 891 goto clean_up;
892 } 892 }
893 893
894 err = gr_gk20a_update_smpc_ctxsw_mode(g, ch_gk20a, 894 err = g->ops.gr.update_smpc_ctxsw_mode(g, ch_gk20a,
895 args->mode == NVGPU_DBG_GPU_SMPC_CTXSW_MODE_CTXSW); 895 args->mode == NVGPU_DBG_GPU_SMPC_CTXSW_MODE_CTXSW);
896 if (err) { 896 if (err) {
897 gk20a_err(dev_from_gk20a(g), 897 gk20a_err(dev_from_gk20a(g),
898 "error (%d) during smpc ctxsw mode update\n", err); 898 "error (%d) during smpc ctxsw mode update\n", err);
@@ -927,8 +927,8 @@ static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s,
927 goto clean_up; 927 goto clean_up;
928 } 928 }
929 929
930 err = gr_gk20a_update_hwpm_ctxsw_mode(g, ch_gk20a, 930 err = g->ops.gr.update_hwpm_ctxsw_mode(g, ch_gk20a,
931 args->mode == NVGPU_DBG_GPU_HWPM_CTXSW_MODE_CTXSW); 931 args->mode == NVGPU_DBG_GPU_HWPM_CTXSW_MODE_CTXSW);
932 if (err) 932 if (err)
933 gk20a_err(dev_from_gk20a(g), 933 gk20a_err(dev_from_gk20a(g),
934 "error (%d) during pm ctxsw mode update\n", err); 934 "error (%d) during pm ctxsw mode update\n", err);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 9d8dc5f7..d9cc3d4f 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -172,6 +172,12 @@ struct gpu_ops {
172 void (*update_ctxsw_preemption_mode)(struct gk20a *g, 172 void (*update_ctxsw_preemption_mode)(struct gk20a *g,
173 struct channel_ctx_gk20a *ch_ctx, 173 struct channel_ctx_gk20a *ch_ctx,
174 void *ctx_ptr); 174 void *ctx_ptr);
175 int (*update_smpc_ctxsw_mode)(struct gk20a *g,
176 struct channel_gk20a *c,
177 bool enable);
178 int (*update_hwpm_ctxsw_mode)(struct gk20a *g,
179 struct channel_gk20a *c,
180 bool enable);
175 int (*dump_gr_regs)(struct gk20a *g, 181 int (*dump_gr_regs)(struct gk20a *g,
176 struct gk20a_debug_output *o); 182 struct gk20a_debug_output *o);
177 int (*update_pc_sampling)(struct channel_gk20a *ch, 183 int (*update_pc_sampling)(struct channel_gk20a *ch,
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index b0b5571f..ada67edd 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -8308,4 +8308,6 @@ void gk20a_init_gr_ops(struct gpu_ops *gops)
8308 gops->gr.handle_sm_exception = gr_gk20a_handle_sm_exception; 8308 gops->gr.handle_sm_exception = gr_gk20a_handle_sm_exception;
8309 gops->gr.handle_tex_exception = gr_gk20a_handle_tex_exception; 8309 gops->gr.handle_tex_exception = gr_gk20a_handle_tex_exception;
8310 gops->gr.get_lrf_tex_ltc_dram_override = NULL; 8310 gops->gr.get_lrf_tex_ltc_dram_override = NULL;
8311 gops->gr.update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode;
8312 gops->gr.update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode;
8311} 8313}
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
index 52d6c4e5..5390536e 100644
--- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h
@@ -76,6 +76,7 @@ struct zcull_ctx_desc {
76struct pm_ctx_desc { 76struct pm_ctx_desc {
77 struct mem_desc mem; 77 struct mem_desc mem;
78 u32 pm_mode; 78 u32 pm_mode;
79 bool ctx_was_enabled; /* Used in the virtual case only */
79}; 80};
80 81
81struct gk20a; 82struct gk20a;