7 files changed, 10 insertions, 24 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
index 3c6d8924..32c95e2f 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_ctx_gk20a.c
@@ -442,9 +442,7 @@ done:
 
 int gr_gk20a_init_ctx_vars(struct gk20a *g, struct gr_gk20a *gr)
 {
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
-
-        if (platform->is_fmodel)
+        if (g->is_fmodel)
                 return gr_gk20a_init_ctx_vars_sim(g, gr);
         else
                 return gr_gk20a_init_ctx_vars_fw(g, gr);
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 0e787356..22093a34 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -380,10 +380,9 @@ int gr_gk20a_wait_fe_idle(struct gk20a *g, unsigned long duration_ms,
 {
         u32 val;
         u32 delay = expect_delay;
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
         struct nvgpu_timeout timeout;
 
-        if (platform->is_fmodel)
+        if (g->is_fmodel)
                 return 0;
 
         gk20a_dbg_fn("");
@@ -1581,7 +1580,6 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
         struct aiv_list_gk20a *sw_ctx_load = &g->gr.ctx_vars.sw_ctx_load;
         struct av_list_gk20a *sw_method_init = &g->gr.ctx_vars.sw_method_init;
         u32 last_method_data = 0;
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
         struct ctx_header_desc *ctx = &c->ch_ctx.ctx_header;
         struct nvgpu_mem *ctxheader = &ctx->mem;
 
@@ -1595,7 +1593,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
         if (gr->ctx_vars.golden_image_initialized) {
                 goto clean_up;
         }
-        if (!platform->is_fmodel) {
+        if (!g->is_fmodel) {
                 struct nvgpu_timeout timeout;
 
                 nvgpu_timeout_init(g, &timeout, FE_PWR_MODE_TIMEOUT_MAX / 1000,
@@ -1638,7 +1636,7 @@ static int gr_gk20a_init_golden_ctx_image(struct gk20a *g,
         gk20a_readl(g, gr_fecs_ctxsw_reset_ctl_r());
         nvgpu_udelay(10);
 
-        if (!platform->is_fmodel) {
+        if (!g->is_fmodel) {
                 struct nvgpu_timeout timeout;
 
                 nvgpu_timeout_init(g, &timeout, FE_PWR_MODE_TIMEOUT_MAX / 1000,
@@ -2580,11 +2578,10 @@ static void gr_gk20a_load_falcon_with_bootloader(struct gk20a *g)
 int gr_gk20a_load_ctxsw_ucode(struct gk20a *g)
 {
         int err;
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
 
         gk20a_dbg_fn("");
 
-        if (platform->is_fmodel) {
+        if (g->is_fmodel) {
                 gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(7),
                         gr_fecs_ctxsw_mailbox_value_f(0xc0de7777));
                 gk20a_writel(g, gr_gpccs_ctxsw_mailbox_r(7),
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_common.c b/drivers/gpu/nvgpu/gk20a/ltc_common.c
index 6162d420..b92dda6d 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_common.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_common.c
@@ -91,9 +91,8 @@ static void gk20a_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr)
         u64 compbit_base_post_multiply64;
         u64 compbit_store_iova;
         u64 compbit_base_post_divide64;
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
 
-        if (platform->is_fmodel)
+        if (g->is_fmodel)
                 compbit_store_iova = gk20a_mem_phys(&gr->compbit_store.mem);
         else
                 compbit_store_iova = g->ops.mm.get_iova_addr(g,
diff --git a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
index d8d9226c..4bd8f816 100644
--- a/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ltc_gk20a.c
@@ -49,7 +49,6 @@ static int gk20a_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
         u32 compbit_backing_size;
 
         int err;
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
 
         gk20a_dbg_fn("");
 
@@ -83,7 +82,7 @@ static int gk20a_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
         gk20a_dbg_info("max comptag lines : %d",
                 max_comptag_lines);
 
-        if (platform->is_fmodel)
+        if (g->is_fmodel)
                 err = gk20a_ltc_alloc_phys_cbc(g, compbit_backing_size);
         else
                 err = gk20a_ltc_alloc_virt_cbc(g, compbit_backing_size);
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
index 4bdbda43..1115a5fb 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
@@ -39,9 +39,6 @@ struct gk20a_platform {
         struct gk20a *g;
 
         /* Should be populated at probe. */
-        bool is_fmodel;
-
-        /* Should be populated at probe. */
         bool can_railgate;
 
         /* Set by User while disabling railgating */
diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
index 07cdc9e5..1584ffda 100644
--- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
@@ -28,9 +28,7 @@
 
 void gk20a_enable_priv_ring(struct gk20a *g)
 {
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
-
-        if (platform->is_fmodel)
+        if (g->is_fmodel)
                 return;
 
         if (g->ops.clock_gating.slcg_priring_load_gating_prod)
@@ -75,9 +73,8 @@ void gk20a_priv_ring_isr(struct gk20a *g)
         s32 retry = 100;
         u32 gpc;
         u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
 
-        if (platform->is_fmodel)
+        if (g->is_fmodel)
                 return;
 
         status0 = gk20a_readl(g, pri_ringmaster_intr_status0_r());
diff --git a/drivers/gpu/nvgpu/gk20a/therm_gk20a.c b/drivers/gpu/nvgpu/gk20a/therm_gk20a.c
index 234c2937..0d2f1281 100644
--- a/drivers/gpu/nvgpu/gk20a/therm_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/therm_gk20a.c
@@ -117,7 +117,6 @@ int gk20a_elcg_init_idle_filters(struct gk20a *g)
         u32 engine_id;
         u32 active_engine_id = 0;
         struct fifo_gk20a *f = &g->fifo;
-        struct gk20a_platform *platform = dev_get_drvdata(g->dev);
 
         gk20a_dbg_fn("");
 
@@ -125,7 +124,7 @@ int gk20a_elcg_init_idle_filters(struct gk20a *g)
                 active_engine_id = f->active_engines_list[engine_id];
                 gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(active_engine_id));
 
-                if (platform->is_fmodel) {
+                if (g->is_fmodel) {
                         gate_ctrl = set_field(gate_ctrl,
                                 therm_gate_ctrl_eng_delay_after_m(),
                                 therm_gate_ctrl_eng_delay_after_f(4));