diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a_scale.c | 14 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/hal_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/platform_gk20a.h | 3 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | 4 |
5 files changed, 10 insertions, 15 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 5a4eaf39..695d2d1a 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -691,6 +691,8 @@ struct gpu_ops { | |||
691 | int (*suspend_clk_support)(struct gk20a *g); | 691 | int (*suspend_clk_support)(struct gk20a *g); |
692 | u32 (*get_crystal_clk_hz)(struct gk20a *g); | 692 | u32 (*get_crystal_clk_hz)(struct gk20a *g); |
693 | unsigned long (*measure_freq)(struct gk20a *g, u32 api_domain); | 693 | unsigned long (*measure_freq)(struct gk20a *g, u32 api_domain); |
694 | unsigned long (*get_rate)(struct gk20a *g, u32 api_domain); | ||
695 | int (*set_rate)(struct gk20a *g, u32 api_domain, unsigned long rate); | ||
694 | } clk; | 696 | } clk; |
695 | struct { | 697 | struct { |
696 | u32 (*get_arbiter_clk_domains)(struct gk20a *g); | 698 | u32 (*get_arbiter_clk_domains)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_scale.c b/drivers/gpu/nvgpu/gk20a/gk20a_scale.c index edf92de6..b9e92f15 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a_scale.c +++ b/drivers/gpu/nvgpu/gk20a/gk20a_scale.c | |||
@@ -19,10 +19,8 @@ | |||
19 | #include <linux/devfreq.h> | 19 | #include <linux/devfreq.h> |
20 | #include <linux/debugfs.h> | 20 | #include <linux/debugfs.h> |
21 | #include <linux/types.h> | 21 | #include <linux/types.h> |
22 | #include <linux/clk.h> | ||
23 | #include <linux/export.h> | 22 | #include <linux/export.h> |
24 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
25 | #include <linux/clk/tegra.h> | ||
26 | #include <soc/tegra/chip-id.h> | 24 | #include <soc/tegra/chip-id.h> |
27 | #include <linux/platform_data/tegra_edp.h> | 25 | #include <linux/platform_data/tegra_edp.h> |
28 | #include <linux/pm_qos.h> | 26 | #include <linux/pm_qos.h> |
@@ -188,11 +186,11 @@ static int gk20a_scale_target(struct device *dev, unsigned long *freq, | |||
188 | if (rounded_rate == g->last_freq) | 186 | if (rounded_rate == g->last_freq) |
189 | return 0; | 187 | return 0; |
190 | 188 | ||
191 | if (platform->clk_get_rate(dev) == rounded_rate) | 189 | if (g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK) == rounded_rate) |
192 | *freq = rounded_rate; | 190 | *freq = rounded_rate; |
193 | else { | 191 | else { |
194 | platform->clk_set_rate(dev, rounded_rate); | 192 | g->ops.clk.set_rate(g, CTRL_CLK_DOMAIN_GPCCLK, rounded_rate); |
195 | *freq = platform->clk_get_rate(dev); | 193 | *freq = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK); |
196 | } | 194 | } |
197 | 195 | ||
198 | g->last_freq = *freq; | 196 | g->last_freq = *freq; |
@@ -321,7 +319,7 @@ static int gk20a_scale_get_dev_status(struct device *dev, | |||
321 | 319 | ||
322 | /* Make sure there are correct values for the current frequency */ | 320 | /* Make sure there are correct values for the current frequency */ |
323 | profile->dev_stat.current_frequency = | 321 | profile->dev_stat.current_frequency = |
324 | platform->clk_get_rate(profile->dev); | 322 | g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK); |
325 | 323 | ||
326 | /* Update load estimate */ | 324 | /* Update load estimate */ |
327 | update_load_estimate_gpmu(dev); | 325 | update_load_estimate_gpmu(dev); |
@@ -344,8 +342,8 @@ static int gk20a_scale_get_dev_status(struct device *dev, | |||
344 | 342 | ||
345 | static int get_cur_freq(struct device *dev, unsigned long *freq) | 343 | static int get_cur_freq(struct device *dev, unsigned long *freq) |
346 | { | 344 | { |
347 | struct gk20a_platform *platform = dev_get_drvdata(dev); | 345 | struct gk20a *g = get_gk20a(dev); |
348 | *freq = platform->clk_get_rate(dev); | 346 | *freq = g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_GPCCLK); |
349 | return 0; | 347 | return 0; |
350 | } | 348 | } |
351 | 349 | ||
diff --git a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c index 9eb8e835..23725b8b 100644 --- a/drivers/gpu/nvgpu/gk20a/hal_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/hal_gk20a.c | |||
@@ -143,7 +143,7 @@ int gk20a_init_hal(struct gk20a *g) | |||
143 | struct gpu_ops *gops = &g->ops; | 143 | struct gpu_ops *gops = &g->ops; |
144 | struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics; | 144 | struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics; |
145 | 145 | ||
146 | *gops = gk20a_ops; | 146 | gops->clock_gating = gk20a_ops.clock_gating; |
147 | gops->privsecurity = 0; | 147 | gops->privsecurity = 0; |
148 | gops->securegpccs = 0; | 148 | gops->securegpccs = 0; |
149 | gops->pmupstate = false; | 149 | gops->pmupstate = false; |
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h index 42be2271..b23d0091 100644 --- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h | |||
@@ -196,11 +196,8 @@ struct gk20a_platform { | |||
196 | unsigned long **freqs, int *num_freqs); | 196 | unsigned long **freqs, int *num_freqs); |
197 | 197 | ||
198 | /* clk related supported functions */ | 198 | /* clk related supported functions */ |
199 | unsigned long (*clk_get_rate)(struct device *dev); | ||
200 | long (*clk_round_rate)(struct device *dev, | 199 | long (*clk_round_rate)(struct device *dev, |
201 | unsigned long rate); | 200 | unsigned long rate); |
202 | int (*clk_set_rate)(struct device *dev, | ||
203 | unsigned long rate); | ||
204 | 201 | ||
205 | /* Called to register GPCPLL with common clk framework */ | 202 | /* Called to register GPCPLL with common clk framework */ |
206 | int (*clk_register)(struct gk20a *g); | 203 | int (*clk_register)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c index 7e37762c..c7e68f44 100644 --- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.c | |||
@@ -18,7 +18,6 @@ | |||
18 | 18 | ||
19 | #include <linux/delay.h> /* for mdelay */ | 19 | #include <linux/delay.h> /* for mdelay */ |
20 | #include <linux/firmware.h> | 20 | #include <linux/firmware.h> |
21 | #include <linux/clk.h> | ||
22 | #include <linux/module.h> | 21 | #include <linux/module.h> |
23 | #include <linux/debugfs.h> | 22 | #include <linux/debugfs.h> |
24 | #include <linux/dma-mapping.h> | 23 | #include <linux/dma-mapping.h> |
@@ -2474,7 +2473,6 @@ int pmu_reset(struct pmu_gk20a *pmu) | |||
2474 | int pmu_bootstrap(struct pmu_gk20a *pmu) | 2473 | int pmu_bootstrap(struct pmu_gk20a *pmu) |
2475 | { | 2474 | { |
2476 | struct gk20a *g = gk20a_from_pmu(pmu); | 2475 | struct gk20a *g = gk20a_from_pmu(pmu); |
2477 | struct gk20a_platform *platform = dev_get_drvdata(g->dev); | ||
2478 | struct mm_gk20a *mm = &g->mm; | 2476 | struct mm_gk20a *mm = &g->mm; |
2479 | struct pmu_ucode_desc *desc = pmu->desc; | 2477 | struct pmu_ucode_desc *desc = pmu->desc; |
2480 | u64 addr_code, addr_data, addr_load; | 2478 | u64 addr_code, addr_data, addr_load; |
@@ -2499,7 +2497,7 @@ int pmu_bootstrap(struct pmu_gk20a *pmu) | |||
2499 | pmu, GK20A_PMU_DMAIDX_VIRT); | 2497 | pmu, GK20A_PMU_DMAIDX_VIRT); |
2500 | 2498 | ||
2501 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, | 2499 | g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, |
2502 | clk_get_rate(platform->clk[1])); | 2500 | g->ops.clk.get_rate(g, CTRL_CLK_DOMAIN_PWRCLK)); |
2503 | 2501 | ||
2504 | addr_args = (pwr_falcon_hwcfg_dmem_size_v( | 2502 | addr_args = (pwr_falcon_hwcfg_dmem_size_v( |
2505 | gk20a_readl(g, pwr_falcon_hwcfg_r())) | 2503 | gk20a_readl(g, pwr_falcon_hwcfg_r())) |