6 files changed, 0 insertions, 63 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 04ee84f4..99c518b5 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -427,7 +427,6 @@ void gk20a_ce_suspend(struct gk20a *g)
 /* CE app utility functions */
 u32 gk20a_ce_create_context(struct gk20a *g,
                 int runlist_id,
-                int priority,
                 int timeslice,
                 int runlist_level)
 {
@@ -507,16 +506,6 @@ u32 gk20a_ce_create_context(struct gk20a *g,
 
         memset(ce_ctx->cmd_buf_mem.cpu_va, 0x00, ce_ctx->cmd_buf_mem.size);
 
-        /* -1 means default channel priority */
-        if (priority != -1) {
-                err = gk20a_fifo_set_priority(ce_ctx->ch, priority);
-                if (err) {
-                        nvgpu_err(g,
-                                "ce: could not set the channel priority for CE context");
-                        goto end;
-                }
-        }
-
         /* -1 means default channel timeslice value */
         if (timeslice != -1) {
                 err = gk20a_fifo_set_timeslice(ce_ctx->ch, timeslice);
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h
index 5c3a1cfc..1d9d8c72 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.h
@@ -128,7 +128,6 @@ void gk20a_ce_destroy(struct gk20a *g);
 /* CE app utility functions */
 u32 gk20a_ce_create_context(struct gk20a *g,
                 int runlist_id,
-                int priority,
                 int timeslice,
                 int runlist_level);
 int gk20a_ce_execute_ops(struct gk20a *g,
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index 1ea7d6b3..648a8c86 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -3962,32 +3962,6 @@ int gk20a_fifo_set_timeslice(struct channel_gk20a *ch, u32 timeslice)
         return channel_gk20a_set_schedule_params(ch);
 }
 
-int gk20a_fifo_set_priority(struct channel_gk20a *ch, u32 priority)
-{
-        if (gk20a_is_channel_marked_as_tsg(ch)) {
-                nvgpu_err(ch->g, "invalid operation for TSG!");
-                return -EINVAL;
-        }
-
-        /* set priority of graphics channel */
-        switch (priority) {
-        case NVGPU_PRIORITY_LOW:
-                ch->timeslice_us = ch->g->timeslice_low_priority_us;
-                break;
-        case NVGPU_PRIORITY_MEDIUM:
-                ch->timeslice_us = ch->g->timeslice_medium_priority_us;
-                break;
-        case NVGPU_PRIORITY_HIGH:
-                ch->timeslice_us = ch->g->timeslice_high_priority_us;
-                break;
-        default:
-                pr_err("Unsupported priority");
-                return -EINVAL;
-        }
-
-        return channel_gk20a_set_schedule_params(ch);
-}
-
 void gk20a_fifo_setup_ramfc_for_privileged_channel(struct channel_gk20a *c)
 {
         struct gk20a *g = c->g;
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index fa1d9f72..3587ffa8 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -383,7 +383,6 @@ void __locked_fifo_preempt_timeout_rc(struct gk20a *g, u32 id,
 int gk20a_fifo_setup_ramfc(struct channel_gk20a *c,
                         u64 gpfifo_base, u32 gpfifo_entries,
                         unsigned long timeout, u32 flags);
-int gk20a_fifo_set_priority(struct channel_gk20a *ch, u32 priority);
 int gk20a_fifo_set_timeslice(struct channel_gk20a *ch, unsigned int timeslice);
 void gk20a_fifo_setup_ramfc_for_privileged_channel(struct channel_gk20a *c);
 int gk20a_fifo_alloc_inst(struct gk20a *g, struct channel_gk20a *ch);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index fb12d0d2..3381d974 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -513,7 +513,6 @@ struct gpu_ops {
                 int (*wait_engine_idle)(struct gk20a *g);
                 u32 (*get_num_fifos)(struct gk20a *g);
                 u32 (*get_pbdma_signature)(struct gk20a *g);
-                int (*channel_set_priority)(struct channel_gk20a *ch, u32 priority);
                 int (*set_runlist_interleave)(struct gk20a *g, u32 id,
                                         bool is_tsg, u32 runlist_id,
                                         u32 new_level);
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index 5af01a05..636ee8a0 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -200,29 +200,6 @@ int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid)
         return 0;
 }
 
-int gk20a_tsg_set_priority(struct gk20a *g, struct tsg_gk20a *tsg,
-                                u32 priority)
-{
-        u32 timeslice_us;
-
-        switch (priority) {
-        case NVGPU_PRIORITY_LOW:
-                timeslice_us = g->timeslice_low_priority_us;
-                break;
-        case NVGPU_PRIORITY_MEDIUM:
-                timeslice_us = g->timeslice_medium_priority_us;
-                break;
-        case NVGPU_PRIORITY_HIGH:
-                timeslice_us = g->timeslice_high_priority_us;
-                break;
-        default:
-                pr_err("Unsupported priority");
-                return -EINVAL;
-        }
-
-        return gk20a_tsg_set_timeslice(tsg, timeslice_us);
-}
-
 int gk20a_tsg_set_runlist_interleave(struct tsg_gk20a *tsg, u32 level)
 {
         struct gk20a *g = tsg->g;