diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gr_gk20a.c | 8 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 20 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/sim_gk20a.c | 5 |
3 files changed, 4 insertions, 29 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c index 3c3ddc80..1ea59a9d 100644 --- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c | |||
@@ -7980,14 +7980,6 @@ int __gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch, | |||
7980 | ctx_op_nr++; | 7980 | ctx_op_nr++; |
7981 | } | 7981 | } |
7982 | } | 7982 | } |
7983 | #if 0 | ||
7984 | /* flush cpu caches for the ctx buffer? only if cpu cached, of course. | ||
7985 | * they aren't, yet */ | ||
7986 | if (cached) { | ||
7987 | FLUSH_CPU_DCACHE(ctx_ptr, | ||
7988 | sg_phys(ch_ctx->gr_ctx.mem.ref), size); | ||
7989 | } | ||
7990 | #endif | ||
7991 | 7983 | ||
7992 | cleanup: | 7984 | cleanup: |
7993 | if (offsets) | 7985 | if (offsets) |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 434fc422..183d6211 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -21,14 +21,10 @@ | |||
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
22 | * DEALINGS IN THE SOFTWARE. | 22 | * DEALINGS IN THE SOFTWARE. |
23 | */ | 23 | */ |
24 | |||
24 | #ifndef MM_GK20A_H | 25 | #ifndef MM_GK20A_H |
25 | #define MM_GK20A_H | 26 | #define MM_GK20A_H |
26 | 27 | ||
27 | #include <linux/scatterlist.h> | ||
28 | #include <linux/iommu.h> | ||
29 | #include <asm/dma-iommu.h> | ||
30 | #include <asm/cacheflush.h> | ||
31 | |||
32 | #include <nvgpu/nvgpu_mem.h> | 28 | #include <nvgpu/nvgpu_mem.h> |
33 | #include <nvgpu/allocator.h> | 29 | #include <nvgpu/allocator.h> |
34 | #include <nvgpu/vm.h> | 30 | #include <nvgpu/vm.h> |
@@ -36,17 +32,6 @@ | |||
36 | #include <nvgpu/rbtree.h> | 32 | #include <nvgpu/rbtree.h> |
37 | #include <nvgpu/kref.h> | 33 | #include <nvgpu/kref.h> |
38 | 34 | ||
39 | #ifdef CONFIG_ARM64 | ||
40 | #define outer_flush_range(a, b) | ||
41 | #define __cpuc_flush_dcache_area __flush_dcache_area | ||
42 | #endif | ||
43 | |||
44 | #define FLUSH_CPU_DCACHE(va, pa, size) \ | ||
45 | do { \ | ||
46 | __cpuc_flush_dcache_area((void *)(va), (size_t)(size)); \ | ||
47 | outer_flush_range(pa, pa + (size_t)(size)); \ | ||
48 | } while (0) | ||
49 | |||
50 | struct gpfifo_desc { | 35 | struct gpfifo_desc { |
51 | struct nvgpu_mem mem; | 36 | struct nvgpu_mem mem; |
52 | u32 entry_num; | 37 | u32 entry_num; |
@@ -198,7 +183,4 @@ void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *mem, | |||
198 | extern const struct gk20a_mmu_level gk20a_mm_levels_64k[]; | 183 | extern const struct gk20a_mmu_level gk20a_mm_levels_64k[]; |
199 | extern const struct gk20a_mmu_level gk20a_mm_levels_128k[]; | 184 | extern const struct gk20a_mmu_level gk20a_mm_levels_128k[]; |
200 | 185 | ||
201 | int gk20a_mm_get_buffer_info(struct device *dev, int dmabuf_fd, | ||
202 | u64 *buffer_id, u64 *buffer_len); | ||
203 | |||
204 | #endif /* MM_GK20A_H */ | 186 | #endif /* MM_GK20A_H */ |
diff --git a/drivers/gpu/nvgpu/gk20a/sim_gk20a.c b/drivers/gpu/nvgpu/gk20a/sim_gk20a.c index 7eb0aafe..34ca5add 100644 --- a/drivers/gpu/nvgpu/gk20a/sim_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/sim_gk20a.c | |||
@@ -24,11 +24,12 @@ | |||
24 | #include <linux/highmem.h> | 24 | #include <linux/highmem.h> |
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | 26 | ||
27 | #include <nvgpu/log.h> | ||
28 | #include <nvgpu/linux/vm.h> | ||
29 | |||
27 | #include "gk20a.h" | 30 | #include "gk20a.h" |
28 | #include "platform_gk20a.h" | 31 | #include "platform_gk20a.h" |
29 | 32 | ||
30 | #include <nvgpu/log.h> | ||
31 | |||
32 | #include <nvgpu/hw/gk20a/hw_sim_gk20a.h> | 33 | #include <nvgpu/hw/gk20a/hw_sim_gk20a.h> |
33 | 34 | ||
34 | static inline void sim_writel(struct gk20a *g, u32 r, u32 v) | 35 | static inline void sim_writel(struct gk20a *g, u32 r, u32 v) |