diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 2 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.c | 10 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mm_gk20a.h | 6 |
4 files changed, 6 insertions, 14 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c index 6da65abd..0280bbbb 100644 --- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c | |||
@@ -449,7 +449,7 @@ u32 gk20a_ce_create_context(struct gk20a *g, | |||
449 | ce_ctx->ch->timeout.enabled = false; | 449 | ce_ctx->ch->timeout.enabled = false; |
450 | 450 | ||
451 | /* bind the channel to the vm */ | 451 | /* bind the channel to the vm */ |
452 | err = __gk20a_vm_bind_channel(g->mm.ce.vm, ce_ctx->ch); | 452 | err = g->ops.mm.vm_bind_channel(g->mm.ce.vm, ce_ctx->ch); |
453 | if (err) { | 453 | if (err) { |
454 | nvgpu_err(g, "ce: could not bind vm"); | 454 | nvgpu_err(g, "ce: could not bind vm"); |
455 | goto end; | 455 | goto end; |
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index ba27f5d9..0a60d46a 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -855,7 +855,7 @@ struct gpu_ops { | |||
855 | int rw_flag, | 855 | int rw_flag, |
856 | bool sparse, | 856 | bool sparse, |
857 | struct vm_gk20a_mapping_batch *batch); | 857 | struct vm_gk20a_mapping_batch *batch); |
858 | int (*vm_bind_channel)(struct gk20a_as_share *as_share, | 858 | int (*vm_bind_channel)(struct vm_gk20a *vm, |
859 | struct channel_gk20a *ch); | 859 | struct channel_gk20a *ch); |
860 | int (*fb_flush)(struct gk20a *g); | 860 | int (*fb_flush)(struct gk20a *g); |
861 | void (*l2_invalidate)(struct gk20a *g); | 861 | void (*l2_invalidate)(struct gk20a *g); |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c index 4ff6125b..14876296 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | 5 | * copy of this software and associated documentation files (the "Software"), |
@@ -332,7 +332,7 @@ const struct gk20a_mmu_level gk20a_mm_levels_128k[] = { | |||
332 | {.update_entry = NULL} | 332 | {.update_entry = NULL} |
333 | }; | 333 | }; |
334 | 334 | ||
335 | int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch) | 335 | int gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch) |
336 | { | 336 | { |
337 | int err = 0; | 337 | int err = 0; |
338 | 338 | ||
@@ -350,12 +350,6 @@ int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch) | |||
350 | return err; | 350 | return err; |
351 | } | 351 | } |
352 | 352 | ||
353 | int gk20a_vm_bind_channel(struct gk20a_as_share *as_share, | ||
354 | struct channel_gk20a *ch) | ||
355 | { | ||
356 | return __gk20a_vm_bind_channel(as_share->vm, ch); | ||
357 | } | ||
358 | |||
359 | void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, | 353 | void gk20a_mm_init_pdb(struct gk20a *g, struct nvgpu_mem *inst_block, |
360 | struct vm_gk20a *vm) | 354 | struct vm_gk20a *vm) |
361 | { | 355 | { |
diff --git a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h index 14629611..55d74435 100644 --- a/drivers/gpu/nvgpu/gk20a/mm_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mm_gk20a.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GK20A memory management | 2 | * GK20A memory management |
3 | * | 3 | * |
4 | * Copyright (c) 2011-2017, NVIDIA CORPORATION. All rights reserved. | 4 | * Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved. |
5 | * | 5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
7 | * copy of this software and associated documentation files (the "Software"), | 7 | * copy of this software and associated documentation files (the "Software"), |
@@ -165,9 +165,7 @@ void gk20a_locked_gmmu_unmap(struct vm_gk20a *vm, | |||
165 | struct nvgpu_as_alloc_space_args; | 165 | struct nvgpu_as_alloc_space_args; |
166 | struct nvgpu_as_free_space_args; | 166 | struct nvgpu_as_free_space_args; |
167 | int gk20a_vm_release_share(struct gk20a_as_share *as_share); | 167 | int gk20a_vm_release_share(struct gk20a_as_share *as_share); |
168 | int gk20a_vm_bind_channel(struct gk20a_as_share *as_share, | 168 | int gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch); |
169 | struct channel_gk20a *ch); | ||
170 | int __gk20a_vm_bind_channel(struct vm_gk20a *vm, struct channel_gk20a *ch); | ||
171 | 169 | ||
172 | void pde_range_from_vaddr_range(struct vm_gk20a *vm, | 170 | void pde_range_from_vaddr_range(struct vm_gk20a *vm, |
173 | u64 addr_lo, u64 addr_hi, | 171 | u64 addr_lo, u64 addr_hi, |