summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r--drivers/gpu/nvgpu/gk20a/gk20a.h3
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.h4
2 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index 58e69cbe..22a9ce4c 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -57,9 +57,11 @@ struct acr_desc;
57#ifdef CONFIG_ARCH_TEGRA_18x_SOC 57#ifdef CONFIG_ARCH_TEGRA_18x_SOC
58#include "clk/clk.h" 58#include "clk/clk.h"
59#include "perf/perf.h" 59#include "perf/perf.h"
60#include "pmgr/pmgr.h"
60#endif 61#endif
61#include "gm206/bios_gm206.h" 62#include "gm206/bios_gm206.h"
62 63
64
63/* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds. 65/* PTIMER_REF_FREQ_HZ corresponds to a period of 32 nanoseconds.
64 32 ns is the resolution of ptimer. */ 66 32 ns is the resolution of ptimer. */
65#define PTIMER_REF_FREQ_HZ 31250000 67#define PTIMER_REF_FREQ_HZ 31250000
@@ -784,6 +786,7 @@ struct gk20a {
784#ifdef CONFIG_ARCH_TEGRA_18x_SOC 786#ifdef CONFIG_ARCH_TEGRA_18x_SOC
785 struct clk_pmupstate clk_pmu; 787 struct clk_pmupstate clk_pmu;
786 struct perf_pmupstate perf_pmu; 788 struct perf_pmupstate perf_pmu;
789 struct pmgr_pmupstate pmgr_pmu;
787#endif 790#endif
788 791
789#ifdef CONFIG_DEBUG_FS 792#ifdef CONFIG_DEBUG_FS
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index b28fd597..d6d57880 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -26,6 +26,7 @@
26#include "pmuif/gpmuifboardobj.h" 26#include "pmuif/gpmuifboardobj.h"
27#include "pmuif/gpmuifclk.h" 27#include "pmuif/gpmuifclk.h"
28#include "pmuif/gpmuifperf.h" 28#include "pmuif/gpmuifperf.h"
29#include "pmuif/gpmuifpmgr.h"
29 30
30/* defined by pmu hw spec */ 31/* defined by pmu hw spec */
31#define GK20A_PMU_VA_SIZE (512 * 1024 * 1024) 32#define GK20A_PMU_VA_SIZE (512 * 1024 * 1024)
@@ -179,6 +180,7 @@ struct pmu_ucode_desc_v1 {
179#define PMU_UNIT_RC (0x1F) 180#define PMU_UNIT_RC (0x1F)
180#define PMU_UNIT_FECS_MEM_OVERRIDE (0x1E) 181#define PMU_UNIT_FECS_MEM_OVERRIDE (0x1E)
181#define PMU_UNIT_CLK (0x0D) 182#define PMU_UNIT_CLK (0x0D)
183#define PMU_UNIT_PMGR (0x18)
182 184
183#define PMU_UNIT_END (0x23) 185#define PMU_UNIT_END (0x23)
184 186
@@ -358,6 +360,7 @@ struct pmu_cmd {
358 struct nv_pmu_boardobj_cmd boardobj; 360 struct nv_pmu_boardobj_cmd boardobj;
359 struct nv_pmu_perf_cmd perf; 361 struct nv_pmu_perf_cmd perf;
360 struct nv_pmu_clk_cmd clk; 362 struct nv_pmu_clk_cmd clk;
363 struct nv_pmu_pmgr_cmd pmgr;
361 } cmd; 364 } cmd;
362}; 365};
363 366
@@ -373,6 +376,7 @@ struct pmu_msg {
373 struct nv_pmu_boardobj_msg boardobj; 376 struct nv_pmu_boardobj_msg boardobj;
374 struct nv_pmu_perf_msg perf; 377 struct nv_pmu_perf_msg perf;
375 struct nv_pmu_clk_msg clk; 378 struct nv_pmu_clk_msg clk;
379 struct nv_pmu_pmgr_msg pmgr;
376 } msg; 380 } msg;
377}; 381};
378 382