diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h index 274194be..ed54ba7a 100644 --- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h | |||
@@ -29,6 +29,21 @@ enum { | |||
29 | GK20A_GPC_PLL = 0, | 29 | GK20A_GPC_PLL = 0, |
30 | }; | 30 | }; |
31 | 31 | ||
32 | enum gpc_pll_mode { | ||
33 | GPC_PLL_MODE_F = 0, | ||
34 | GPC_PLL_MODE_DVFS, | ||
35 | }; | ||
36 | |||
37 | struct na_dvfs { | ||
38 | u32 n_int; | ||
39 | u32 sdm_din; | ||
40 | int dfs_coeff; | ||
41 | int dfs_det_max; | ||
42 | int dfs_ext_cal; | ||
43 | int uv_cal; | ||
44 | int mv; | ||
45 | }; | ||
46 | |||
32 | struct pll { | 47 | struct pll { |
33 | u32 id; | 48 | u32 id; |
34 | u32 clk_in; /* KHz */ | 49 | u32 clk_in; /* KHz */ |
@@ -37,6 +52,8 @@ struct pll { | |||
37 | u32 PL; | 52 | u32 PL; |
38 | u32 freq; /* KHz */ | 53 | u32 freq; /* KHz */ |
39 | bool enabled; | 54 | bool enabled; |
55 | enum gpc_pll_mode mode; | ||
56 | struct na_dvfs dvfs; | ||
40 | }; | 57 | }; |
41 | 58 | ||
42 | struct pll_parms { | 59 | struct pll_parms { |
@@ -46,6 +63,10 @@ struct pll_parms { | |||
46 | u32 min_M, max_M; | 63 | u32 min_M, max_M; |
47 | u32 min_N, max_N; | 64 | u32 min_N, max_N; |
48 | u32 min_PL, max_PL; | 65 | u32 min_PL, max_PL; |
66 | /* NA mode parameters*/ | ||
67 | int coeff_slope, coeff_offs; /* coeff = slope * V + offs */ | ||
68 | int uvdet_slope, uvdet_offs; /* uV = slope * det + offs */ | ||
69 | u32 vco_ctrl; | ||
49 | }; | 70 | }; |
50 | 71 | ||
51 | struct clk_gk20a { | 72 | struct clk_gk20a { |
@@ -54,6 +75,7 @@ struct clk_gk20a { | |||
54 | struct pll gpc_pll; | 75 | struct pll gpc_pll; |
55 | struct pll gpc_pll_last; | 76 | struct pll gpc_pll_last; |
56 | u32 pll_delay; /* default PLL settle time */ | 77 | u32 pll_delay; /* default PLL settle time */ |
78 | u32 na_pll_delay; /* default PLL settle time in NA mode */ | ||
57 | struct mutex clk_mutex; | 79 | struct mutex clk_mutex; |
58 | bool sw_ready; | 80 | bool sw_ready; |
59 | bool clk_hw_on; | 81 | bool clk_hw_on; |