diff options
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/gk20a.h | 1 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mc_gk20a.c | 39 | ||||
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/mc_gk20a.h | 1 |
3 files changed, 41 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h index 03cfe285..bf2e0dbb 100644 --- a/drivers/gpu/nvgpu/gk20a/gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/gk20a.h | |||
@@ -1066,6 +1066,7 @@ struct gpu_ops { | |||
1066 | u32 (*intr_nonstall)(struct gk20a *g); | 1066 | u32 (*intr_nonstall)(struct gk20a *g); |
1067 | void (*intr_nonstall_pause)(struct gk20a *g); | 1067 | void (*intr_nonstall_pause)(struct gk20a *g); |
1068 | void (*intr_nonstall_resume)(struct gk20a *g); | 1068 | void (*intr_nonstall_resume)(struct gk20a *g); |
1069 | int (*isr_nonstall)(struct gk20a *g); | ||
1069 | void (*enable)(struct gk20a *g, u32 units); | 1070 | void (*enable)(struct gk20a *g, u32 units); |
1070 | void (*disable)(struct gk20a *g, u32 units); | 1071 | void (*disable)(struct gk20a *g, u32 units); |
1071 | void (*reset)(struct gk20a *g, u32 units); | 1072 | void (*reset)(struct gk20a *g, u32 units); |
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c index e6d81a87..7fed410e 100644 --- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.c | |||
@@ -74,6 +74,45 @@ void mc_gk20a_isr_stall(struct gk20a *g) | |||
74 | g->ops.bus.isr(g); | 74 | g->ops.bus.isr(g); |
75 | } | 75 | } |
76 | 76 | ||
77 | int mc_gk20a_isr_nonstall(struct gk20a *g) | ||
78 | { | ||
79 | int ops = 0; | ||
80 | u32 mc_intr_1; | ||
81 | u32 engine_id_idx; | ||
82 | u32 active_engine_id = 0; | ||
83 | u32 engine_enum = ENGINE_INVAL_GK20A; | ||
84 | |||
85 | mc_intr_1 = g->ops.mc.intr_nonstall(g); | ||
86 | |||
87 | if (g->ops.mc.is_intr1_pending(g, NVGPU_UNIT_FIFO, mc_intr_1)) | ||
88 | ops |= gk20a_fifo_nonstall_isr(g); | ||
89 | |||
90 | for (engine_id_idx = 0; engine_id_idx < g->fifo.num_engines; | ||
91 | engine_id_idx++) { | ||
92 | struct fifo_engine_info_gk20a *engine_info; | ||
93 | |||
94 | active_engine_id = g->fifo.active_engines_list[engine_id_idx]; | ||
95 | engine_info = &g->fifo.engine_info[active_engine_id]; | ||
96 | |||
97 | if (mc_intr_1 & engine_info->intr_mask) { | ||
98 | engine_enum = engine_info->engine_enum; | ||
99 | /* GR Engine */ | ||
100 | if (engine_enum == ENGINE_GR_GK20A) | ||
101 | ops |= gk20a_gr_nonstall_isr(g); | ||
102 | |||
103 | /* CE Engine */ | ||
104 | if (((engine_enum == ENGINE_GRCE_GK20A) || | ||
105 | (engine_enum == ENGINE_ASYNC_CE_GK20A)) && | ||
106 | g->ops.ce2.isr_nonstall) | ||
107 | ops |= g->ops.ce2.isr_nonstall(g, | ||
108 | engine_info->inst_id, | ||
109 | engine_info->pri_base); | ||
110 | } | ||
111 | } | ||
112 | |||
113 | return ops; | ||
114 | } | ||
115 | |||
77 | void mc_gk20a_intr_enable(struct gk20a *g) | 116 | void mc_gk20a_intr_enable(struct gk20a *g) |
78 | { | 117 | { |
79 | u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g); | 118 | u32 eng_intr_mask = gk20a_fifo_engine_interrupt_mask(g); |
diff --git a/drivers/gpu/nvgpu/gk20a/mc_gk20a.h b/drivers/gpu/nvgpu/gk20a/mc_gk20a.h index 870a1d3f..1ce308b8 100644 --- a/drivers/gpu/nvgpu/gk20a/mc_gk20a.h +++ b/drivers/gpu/nvgpu/gk20a/mc_gk20a.h | |||
@@ -32,6 +32,7 @@ u32 mc_gk20a_intr_stall(struct gk20a *g); | |||
32 | void mc_gk20a_intr_stall_pause(struct gk20a *g); | 32 | void mc_gk20a_intr_stall_pause(struct gk20a *g); |
33 | void mc_gk20a_intr_stall_resume(struct gk20a *g); | 33 | void mc_gk20a_intr_stall_resume(struct gk20a *g); |
34 | u32 mc_gk20a_intr_nonstall(struct gk20a *g); | 34 | u32 mc_gk20a_intr_nonstall(struct gk20a *g); |
35 | int mc_gk20a_isr_nonstall(struct gk20a *g); | ||
35 | void mc_gk20a_intr_nonstall_pause(struct gk20a *g); | 36 | void mc_gk20a_intr_nonstall_pause(struct gk20a *g); |
36 | void mc_gk20a_intr_nonstall_resume(struct gk20a *g); | 37 | void mc_gk20a_intr_nonstall_resume(struct gk20a *g); |
37 | void gk20a_mc_enable(struct gk20a *g, u32 units); | 38 | void gk20a_mc_enable(struct gk20a *g, u32 units); |