4 files changed, 40 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c
index 45b25425..751c6a19 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a_gating_reglist.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2012-2015, NVIDIA Corporation.  All rights reserved.
+ * Copyright (c) 2012-2017, NVIDIA Corporation.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -26,6 +26,7 @@
 #define __gk20a_gating_reglist_h__
 
 #include "gk20a_gating_reglist.h"
+#include <nvgpu/enabled.h>
 
 struct gating_desc {
         u32 addr;
@@ -305,6 +306,10 @@ void gr_gk20a_slcg_gr_load_gating_prod(struct gk20a *g,
 {
         u32 i;
         u32 size = sizeof(gk20a_slcg_gr) / sizeof(struct gating_desc);
+
+        if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG))
+                return;
+
         for (i = 0; i < size; i++) {
                 if (prod)
                         gk20a_writel(g, gk20a_slcg_gr[i].addr,
@@ -325,6 +330,10 @@ void gr_gk20a_slcg_perf_load_gating_prod(struct gk20a *g,
 {
         u32 i;
         u32 size = sizeof(gk20a_slcg_perf) / sizeof(struct gating_desc);
+
+        if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG))
+                return;
+
         for (i = 0; i < size; i++) {
                 if (prod)
                         gk20a_writel(g, gk20a_slcg_perf[i].addr,
@@ -340,6 +349,10 @@ void gr_gk20a_blcg_gr_load_gating_prod(struct gk20a *g,
 {
         u32 i;
         u32 size = sizeof(gk20a_blcg_gr) / sizeof(struct gating_desc);
+
+        if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG))
+                return;
+
         for (i = 0; i < size; i++) {
                 if (prod)
                         gk20a_writel(g, gk20a_blcg_gr[i].addr,
@@ -355,6 +368,10 @@ void gr_gk20a_pg_gr_load_gating_prod(struct gk20a *g,
 {
         u32 i;
         u32 size = sizeof(gk20a_pg_gr) / sizeof(struct gating_desc);
+
+        if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG))
+                return;
+
         for (i = 0; i < size; i++) {
                 if (prod)
                         gk20a_writel(g, gk20a_pg_gr[i].addr,
@@ -370,6 +387,10 @@ void gr_gk20a_slcg_therm_load_gating_prod(struct gk20a *g,
 {
         u32 i;
         u32 size = sizeof(gk20a_slcg_therm) / sizeof(struct gating_desc);
+
+        if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_SLCG))
+                return;
+
         for (i = 0; i < size; i++) {
                 if (prod)
                         gk20a_writel(g, gk20a_slcg_therm[i].addr,
diff --git a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
index 679b8492..628b6823 100644
--- a/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gr_gk20a.c
@@ -4067,6 +4067,9 @@ void gr_gk20a_init_blcg_mode(struct gk20a *g, u32 mode, u32 engine)
 {
         u32 gate_ctrl;
 
+        if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG))
+                return;
+
         gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(engine));
 
         switch (mode) {
@@ -4095,6 +4098,9 @@ void gr_gk20a_init_elcg_mode(struct gk20a *g, u32 mode, u32 engine)
 
         gate_ctrl = gk20a_readl(g, therm_gate_ctrl_r(engine));
 
+        if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_ELCG))
+                return;
+
         switch (mode) {
         case ELCG_RUN:
                 gate_ctrl = set_field(gate_ctrl,
diff --git a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
index 02a5e519..c2c73b9c 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/platform_gk20a.h
@@ -91,6 +91,15 @@ struct gk20a_platform {
         /* Engine Level Clock Gating: true = enable flase = disable */
         bool enable_elcg;
 
+        /* Should be populated at probe. */
+        bool can_slcg;
+
+        /* Should be populated at probe. */
+        bool can_blcg;
+
+        /* Should be populated at probe. */
+        bool can_elcg;
+
         /* Engine Level Power Gating: true = enable flase = disable */
         bool enable_elpg;
 
diff --git a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c
index 43abee5d..90a37c47 100644
--- a/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c
+++ b/drivers/gpu/nvgpu/gk20a/platform_vgpu_tegra.c
@@ -57,6 +57,9 @@ struct gk20a_platform vgpu_tegra_platform = {
         .enable_elcg            = false,
         .enable_elpg            = false,
         .enable_aelpg           = false,
+        .can_slcg               = false,
+        .can_blcg               = false,
+        .can_elcg               = false,
 
         .ch_wdt_timeout_ms = 5000,