3 files changed, 17 insertions, 14 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
index dc1f48b7..00119300 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
@@ -55,7 +55,9 @@
 #define FECS_METHOD_WFI_RESTORE 0x80000
 #define FECS_MAILBOX_0_ACK_RESTORE 0x4
 
-
+static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
+                                            u32 chid, bool add,
+                                            bool wait_for_finish);
 static u32 gk20a_fifo_engines_on_id(struct gk20a *g, u32 id, bool is_tsg);
 
 static const char *const pbdma_intr_fault_type_desc[] = {
@@ -2702,7 +2704,7 @@ void gk20a_fifo_issue_preempt(struct gk20a *g, u32 id, bool is_tsg)
 }
 
 int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id,
-                unsigned int id_type)
+                unsigned int id_type, unsigned int timeout_rc_type)
 {
         struct nvgpu_timeout timeout;
         u32 delay = GR_IDLE_CHECK_DEFAULT;
@@ -2775,8 +2777,8 @@ int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg)
         id_type = is_tsg ? ID_TYPE_TSG : ID_TYPE_CHANNEL;
 
         /* wait for preempt */
-        ret = g->ops.fifo.is_preempt_pending(g, id, id_type);
-
+        ret = g->ops.fifo.is_preempt_pending(g, id, id_type,
+                                         PREEMPT_TIMEOUT_RC);
         return ret;
 }
 
@@ -3273,7 +3275,7 @@ void gk20a_fifo_runlist_hw_submit(struct gk20a *g, u32 runlist_id,
                 fifo_eng_runlist_length_f(count));
 }
 
-int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
+static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
                                             u32 chid, bool add,
                                             bool wait_for_finish)
 {
@@ -3446,7 +3448,8 @@ static int __locked_fifo_reschedule_preempt_next(struct channel_gk20a *ch,
                 gk20a_readl(g, fifo_preempt_r()));
 #endif
         if (wait_preempt) {
-                g->ops.fifo.is_preempt_pending(g, preempt_id, preempt_type);
+                g->ops.fifo.is_preempt_pending(
+                        g, preempt_id, preempt_type, PREEMPT_TIMEOUT_RC);
         }
 #ifdef TRACEPOINTS_ENABLED
         trace_gk20a_reschedule_preempted_next(ch->chid);
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
index 77030c94..bccd15f6 100644
--- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
@@ -50,6 +50,9 @@ enum {
 #define ID_TYPE_TSG                     1
 #define ID_TYPE_UNKNOWN                 ((u32)~0)
 
+#define PREEMPT_TIMEOUT_RC              1
+#define PREEMPT_TIMEOUT_NORC            0
+
 #define RC_YES                          1
 #define RC_NO                           0
 
@@ -254,9 +257,6 @@ int nvgpu_fifo_reschedule_runlist(struct channel_gk20a *ch, bool preempt_next,
 int gk20a_fifo_update_runlist(struct gk20a *g, u32 engine_id, u32 chid,
                               bool add, bool wait_for_finish);
 
-int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
-                                            u32 chid, bool add,
-                                            bool wait_for_finish);
 int gk20a_fifo_suspend(struct gk20a *g);
 
 bool gk20a_fifo_mmu_fault_pending(struct gk20a *g);
@@ -390,8 +390,8 @@ void gk20a_fifo_channel_unbind(struct channel_gk20a *ch_gk20a);
 
 u32 gk20a_fifo_intr_0_error_mask(struct gk20a *g);
 
-int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id,
-                        unsigned int id_type);
+int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id, unsigned int id_type,
+                                         unsigned int timeout_rc_type);
 int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg);
 void gk20a_fifo_preempt_timeout_rc(struct gk20a *g, u32 id,
                                          unsigned int id_type);
diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index fac02f68..9061236e 100644
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -662,9 +662,9 @@ struct gpu_ops {
                                 struct ch_state *ch_state);
                 u32 (*intr_0_error_mask)(struct gk20a *g);
                 int (*is_preempt_pending)(struct gk20a *g, u32 id,
-                        unsigned int id_type);
+                        unsigned int id_type, unsigned int timeout_rc_type);
                 int (*preempt_ch_tsg)(struct gk20a *g, u32 id,
-                        unsigned int id_type);
+                        unsigned int id_type, unsigned int timeout_rc_type);
                 void (*init_pbdma_intr_descs)(struct fifo_gk20a *f);
                 int (*reset_enable_hw)(struct gk20a *g);
                 int (*setup_userd)(struct channel_gk20a *c);
@@ -1109,7 +1109,7 @@ struct gpu_ops {
                 bool (*is_intr_hub_pending)(struct gk20a *g, u32 mc_intr);
                 bool (*is_intr_nvlink_pending)(struct gk20a *g, u32 mc_intr);
                 bool (*is_stall_and_eng_intr_pending)(struct gk20a *g,
-                                        u32 act_eng_id, u32 *eng_intr_pending);
+                                                                u32 act_eng_id);
                 u32 (*intr_stall)(struct gk20a *g);
                 void (*intr_stall_pause)(struct gk20a *g);
                 void (*intr_stall_resume)(struct gk20a *g);