summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/tsg_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/tsg_gk20a.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
index 40c871ce..5f4cf931 100644
--- a/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
@@ -165,24 +165,22 @@ int gk20a_init_tsg_support(struct gk20a *g, u32 tsgid)
165static int gk20a_tsg_set_priority(struct gk20a *g, struct tsg_gk20a *tsg, 165static int gk20a_tsg_set_priority(struct gk20a *g, struct tsg_gk20a *tsg,
166 u32 priority) 166 u32 priority)
167{ 167{
168 int timeslice_period;
169
170 switch (priority) { 168 switch (priority) {
171 case NVGPU_PRIORITY_LOW: 169 case NVGPU_PRIORITY_LOW:
172 timeslice_period = g->timeslice_low_priority_us; 170 tsg->timeslice_us = g->timeslice_low_priority_us;
173 break; 171 break;
174 case NVGPU_PRIORITY_MEDIUM: 172 case NVGPU_PRIORITY_MEDIUM:
175 timeslice_period = g->timeslice_medium_priority_us; 173 tsg->timeslice_us = g->timeslice_medium_priority_us;
176 break; 174 break;
177 case NVGPU_PRIORITY_HIGH: 175 case NVGPU_PRIORITY_HIGH:
178 timeslice_period = g->timeslice_high_priority_us; 176 tsg->timeslice_us = g->timeslice_high_priority_us;
179 break; 177 break;
180 default: 178 default:
181 pr_err("Unsupported priority"); 179 pr_err("Unsupported priority");
182 return -EINVAL; 180 return -EINVAL;
183 } 181 }
184 182
185 gk20a_channel_get_timescale_from_timeslice(g, timeslice_period, 183 gk20a_channel_get_timescale_from_timeslice(g, tsg->timeslice_us,
186 &tsg->timeslice_timeout, &tsg->timeslice_scale); 184 &tsg->timeslice_timeout, &tsg->timeslice_scale);
187 185
188 g->ops.fifo.update_runlist(g, 0, ~0, true, true); 186 g->ops.fifo.update_runlist(g, 0, ~0, true, true);
@@ -407,6 +405,7 @@ int gk20a_tsg_open(struct gk20a *g, struct file *filp)
407 tsg->tsg_gr_ctx = NULL; 405 tsg->tsg_gr_ctx = NULL;
408 tsg->vm = NULL; 406 tsg->vm = NULL;
409 tsg->interleave_level = NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW; 407 tsg->interleave_level = NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW;
408 tsg->timeslice_us = 0;
410 409
411 filp->private_data = tsg; 410 filp->private_data = tsg;
412 411