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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/sim_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/sim_gk20a.h15
1 files changed, 3 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/sim_gk20a.h b/drivers/gpu/nvgpu/gk20a/sim_gk20a.h
index 44378e7a..8f23abd8 100644
--- a/drivers/gpu/nvgpu/gk20a/sim_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/sim_gk20a.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * GK20A sim support 4 * GK20A sim support
5 * 5 *
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 6 * Copyright (c) 2013-2017, NVIDIA CORPORATION. All rights reserved.
7 * 7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a 8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"), 9 * copy of this software and associated documentation files (the "Software"),
@@ -27,25 +27,16 @@
27#define __SIM_GK20A_H__ 27#define __SIM_GK20A_H__
28 28
29struct gk20a; 29struct gk20a;
30struct platform_device;
31 30
32struct sim_gk20a { 31struct sim_gk20a {
33 struct gk20a *g; 32 struct gk20a *g;
34 struct resource *reg_mem;
35 void __iomem *regs;
36 struct {
37 struct page *page;
38 void *kvaddr;
39 u64 phys;
40 } send_bfr, recv_bfr, msg_bfr;
41 u32 send_ring_put; 33 u32 send_ring_put;
42 u32 recv_ring_get; 34 u32 recv_ring_get;
43 u32 recv_ring_put; 35 u32 recv_ring_put;
44 u32 sequence_base; 36 u32 sequence_base;
45 void (*remove_support)(struct sim_gk20a *); 37 void (*remove_support)(struct sim_gk20a *);
38 int (*esc_readl)(
39 struct gk20a *g, char *path, u32 index, u32 *data);
46}; 40};
47 41
48int gk20a_init_sim_support(struct gk20a *g);
49int gk20a_sim_esc_readl(struct gk20a *g, char *path, u32 index, u32 *data);
50
51#endif /*__SIM_GK20A_H__*/ 42#endif /*__SIM_GK20A_H__*/