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path: root/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/regops_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/regops_gk20a.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
index 628b12ef..0e1081b9 100644
--- a/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/regops_gk20a.c
@@ -1,5 +1,4 @@
1/* 1/*
2 *
3 * Tegra GK20A GPU Debugger Driver Register Ops 2 * Tegra GK20A GPU Debugger Driver Register Ops
4 * 3 *
5 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
@@ -372,12 +371,12 @@ static const u32 gk20a_qctl_whitelist_ranges_count =
372 371
373static bool validate_reg_ops(struct dbg_session_gk20a *dbg_s, 372static bool validate_reg_ops(struct dbg_session_gk20a *dbg_s,
374 u32 *ctx_rd_count, u32 *ctx_wr_count, 373 u32 *ctx_rd_count, u32 *ctx_wr_count,
375 struct nvhost_dbg_gpu_reg_op *ops, 374 struct nvgpu_dbg_gpu_reg_op *ops,
376 u32 op_count); 375 u32 op_count);
377 376
378 377
379int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s, 378int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s,
380 struct nvhost_dbg_gpu_reg_op *ops, 379 struct nvgpu_dbg_gpu_reg_op *ops,
381 u64 num_ops) 380 u64 num_ops)
382{ 381{
383 int err = 0, i; 382 int err = 0, i;
@@ -502,7 +501,7 @@ int exec_regops_gk20a(struct dbg_session_gk20a *dbg_s,
502 501
503 502
504static int validate_reg_op_info(struct dbg_session_gk20a *dbg_s, 503static int validate_reg_op_info(struct dbg_session_gk20a *dbg_s,
505 struct nvhost_dbg_gpu_reg_op *op) 504 struct nvgpu_dbg_gpu_reg_op *op)
506{ 505{
507 int err = 0; 506 int err = 0;
508 507
@@ -531,7 +530,7 @@ static int validate_reg_op_info(struct dbg_session_gk20a *dbg_s,
531 case REGOP(TYPE_GR_CTX_QUAD): 530 case REGOP(TYPE_GR_CTX_QUAD):
532 break; 531 break;
533 /* 532 /*
534 case NVHOST_DBG_GPU_REG_OP_TYPE_FB: 533 case NVGPU_DBG_GPU_REG_OP_TYPE_FB:
535 */ 534 */
536 default: 535 default:
537 op->status |= REGOP(STATUS_INVALID_TYPE); 536 op->status |= REGOP(STATUS_INVALID_TYPE);
@@ -544,7 +543,7 @@ static int validate_reg_op_info(struct dbg_session_gk20a *dbg_s,
544} 543}
545 544
546static bool check_whitelists(struct dbg_session_gk20a *dbg_s, 545static bool check_whitelists(struct dbg_session_gk20a *dbg_s,
547 struct nvhost_dbg_gpu_reg_op *op, u32 offset) 546 struct nvgpu_dbg_gpu_reg_op *op, u32 offset)
548{ 547{
549 struct gk20a *g = dbg_s->g; 548 struct gk20a *g = dbg_s->g;
550 bool valid = false; 549 bool valid = false;
@@ -606,7 +605,7 @@ static bool check_whitelists(struct dbg_session_gk20a *dbg_s,
606 605
607/* note: the op here has already been through validate_reg_op_info */ 606/* note: the op here has already been through validate_reg_op_info */
608static int validate_reg_op_offset(struct dbg_session_gk20a *dbg_s, 607static int validate_reg_op_offset(struct dbg_session_gk20a *dbg_s,
609 struct nvhost_dbg_gpu_reg_op *op) 608 struct nvgpu_dbg_gpu_reg_op *op)
610{ 609{
611 int err; 610 int err;
612 u32 buf_offset_lo, buf_offset_addr, num_offsets, offset; 611 u32 buf_offset_lo, buf_offset_addr, num_offsets, offset;
@@ -656,7 +655,7 @@ static int validate_reg_op_offset(struct dbg_session_gk20a *dbg_s,
656 655
657static bool validate_reg_ops(struct dbg_session_gk20a *dbg_s, 656static bool validate_reg_ops(struct dbg_session_gk20a *dbg_s,
658 u32 *ctx_rd_count, u32 *ctx_wr_count, 657 u32 *ctx_rd_count, u32 *ctx_wr_count,
659 struct nvhost_dbg_gpu_reg_op *ops, 658 struct nvgpu_dbg_gpu_reg_op *ops,
660 u32 op_count) 659 u32 op_count)
661{ 660{
662 u32 i; 661 u32 i;