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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.h38
1 files changed, 14 insertions, 24 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index f0e5d3cf..fd27ab5c 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -23,6 +23,9 @@
23 23
24#include "pmu_api.h" 24#include "pmu_api.h"
25#include "pmu_common.h" 25#include "pmu_common.h"
26#include "pmuif/gpmuifboardobj.h"
27#include "pmuif/gpmuifclk.h"
28#include "pmuif/gpmuifperf.h"
26 29
27/* defined by pmu hw spec */ 30/* defined by pmu hw spec */
28#define GK20A_PMU_VA_SIZE (512 * 1024 * 1024) 31#define GK20A_PMU_VA_SIZE (512 * 1024 * 1024)
@@ -172,8 +175,10 @@ struct pmu_ucode_desc_v1 {
172#define PMU_UNIT_ACR (0x0A) 175#define PMU_UNIT_ACR (0x0A)
173#define PMU_UNIT_PERFMON_T18X (0x11) 176#define PMU_UNIT_PERFMON_T18X (0x11)
174#define PMU_UNIT_PERFMON (0x12) 177#define PMU_UNIT_PERFMON (0x12)
175#define PMU_UNIT_RC (0x1F) 178#define PMU_UNIT_PERF (0x13)
179#define PMU_UNIT_RC (0x1F)
176#define PMU_UNIT_FECS_MEM_OVERRIDE (0x1E) 180#define PMU_UNIT_FECS_MEM_OVERRIDE (0x1E)
181#define PMU_UNIT_CLK (0x1C)
177 182
178#define PMU_UNIT_END (0x23) 183#define PMU_UNIT_END (0x23)
179 184
@@ -295,29 +300,6 @@ struct pmu_rc_msg {
295 struct pmu_rc_msg_unhandled_cmd unhandled_cmd; 300 struct pmu_rc_msg_unhandled_cmd unhandled_cmd;
296}; 301};
297 302
298enum {
299 PMU_PG_CMD_ID_ELPG_CMD = 0,
300 PMU_PG_CMD_ID_ENG_BUF_LOAD,
301 PMU_PG_CMD_ID_ENG_BUF_UNLOAD,
302 PMU_PG_CMD_ID_PG_STAT,
303 PMU_PG_CMD_ID_PG_LOG_INIT,
304 PMU_PG_CMD_ID_PG_LOG_FLUSH,
305 PMU_PG_CMD_ID_PG_PARAM,
306 PMU_PG_CMD_ID_ELPG_INIT,
307 PMU_PG_CMD_ID_ELPG_POLL_CTXSAVE,
308 PMU_PG_CMD_ID_ELPG_ABORT_POLL,
309 PMU_PG_CMD_ID_ELPG_PWR_UP,
310 PMU_PG_CMD_ID_ELPG_DISALLOW,
311 PMU_PG_CMD_ID_ELPG_ALLOW,
312 PMU_PG_CMD_ID_AP,
313 RM_PMU_PG_CMD_ID_PSI,
314 RM_PMU_PG_CMD_ID_CG,
315 PMU_PG_CMD_ID_ZBC_TABLE_UPDATE,
316 PMU_PG_CMD_ID_PWR_RAIL_GATE_DISABLE = 0x20,
317 PMU_PG_CMD_ID_PWR_RAIL_GATE_ENABLE,
318 PMU_PG_CMD_ID_PWR_RAIL_SMU_MSG_DISABLE
319};
320
321/***************************** ACR ERROR CODES ******************************/ 303/***************************** ACR ERROR CODES ******************************/
322/*! 304/*!
323 * Error codes used in PMU-ACR Task 305 * Error codes used in PMU-ACR Task
@@ -369,6 +351,9 @@ struct pmu_cmd {
369 struct pmu_zbc_cmd zbc; 351 struct pmu_zbc_cmd zbc;
370 struct pmu_acr_cmd acr; 352 struct pmu_acr_cmd acr;
371 struct pmu_lrf_tex_ltc_dram_cmd lrf_tex_ltc_dram; 353 struct pmu_lrf_tex_ltc_dram_cmd lrf_tex_ltc_dram;
354 struct nv_pmu_boardobj_cmd boardobj;
355 struct nv_pmu_perf_cmd perf;
356 struct nv_pmu_clk_cmd clk;
372 } cmd; 357 } cmd;
373}; 358};
374 359
@@ -381,6 +366,9 @@ struct pmu_msg {
381 struct pmu_rc_msg rc; 366 struct pmu_rc_msg rc;
382 struct pmu_acr_msg acr; 367 struct pmu_acr_msg acr;
383 struct pmu_lrf_tex_ltc_dram_msg lrf_tex_ltc_dram; 368 struct pmu_lrf_tex_ltc_dram_msg lrf_tex_ltc_dram;
369 struct nv_pmu_boardobj_msg boardobj;
370 struct nv_pmu_perf_msg perf;
371 struct nv_pmu_clk_msg clk;
384 } msg; 372 } msg;
385}; 373};
386 374
@@ -813,4 +801,6 @@ int gk20a_pmu_vidmem_surface_alloc(struct gk20a *g, struct mem_desc *mem,
813 u32 size); 801 u32 size);
814int gk20a_pmu_sysmem_surface_alloc(struct gk20a *g, struct mem_desc *mem, 802int gk20a_pmu_sysmem_surface_alloc(struct gk20a *g, struct mem_desc *mem,
815 u32 size); 803 u32 size);
804
805void print_vbios_table(u8 *msg, u8 *buff, int size);
816#endif /*__PMU_GK20A_H__*/ 806#endif /*__PMU_GK20A_H__*/