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path: root/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
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Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/pmu_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/pmu_gk20a.h10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
index 3ad0c116..3992b029 100644
--- a/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
@@ -57,12 +57,10 @@ int gk20a_init_pmu_setup_hw1(struct gk20a *g);
57void gk20a_write_dmatrfbase(struct gk20a *g, u32 addr); 57void gk20a_write_dmatrfbase(struct gk20a *g, u32 addr);
58bool gk20a_is_pmu_supported(struct gk20a *g); 58bool gk20a_is_pmu_supported(struct gk20a *g);
59 59
60void pmu_copy_to_dmem(struct nvgpu_pmu *pmu,
61 u32 dst, u8 *src, u32 size, u8 port);
62int pmu_bootstrap(struct nvgpu_pmu *pmu); 60int pmu_bootstrap(struct nvgpu_pmu *pmu);
63 61
64void pmu_dump_elpg_stats(struct nvgpu_pmu *pmu); 62void gk20a_pmu_dump_elpg_stats(struct nvgpu_pmu *pmu);
65void pmu_dump_falcon_stats(struct nvgpu_pmu *pmu); 63void gk20a_pmu_dump_falcon_stats(struct nvgpu_pmu *pmu);
66 64
67void pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable); 65void pmu_enable_irq(struct nvgpu_pmu *pmu, bool enable);
68int pmu_wait_message_cond(struct nvgpu_pmu *pmu, u32 timeout_ms, 66int pmu_wait_message_cond(struct nvgpu_pmu *pmu, u32 timeout_ms,
@@ -74,8 +72,4 @@ void gk20a_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
74bool gk20a_pmu_is_engine_in_reset(struct gk20a *g); 72bool gk20a_pmu_is_engine_in_reset(struct gk20a *g);
75int gk20a_pmu_engine_reset(struct gk20a *g, bool do_reset); 73int gk20a_pmu_engine_reset(struct gk20a *g, bool do_reset);
76 74
77int pmu_idle(struct nvgpu_pmu *pmu);
78
79bool nvgpu_find_hex_in_string(char *strings, struct gk20a *g, u32 *hex_pos);
80
81#endif /*__PMU_GK20A_H__*/ 75#endif /*__PMU_GK20A_H__*/